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3_Batched_matrix_multiplicationbmm_tiled_shared_memory_optimized_edit_1

Level 1 • Task 3
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(A: torch.Tensor, B: torch.Tensor):
    """
    Performs batched matrix multiplication (C = A * B) where A, B, and C have the same batch dimension.

    Args:
        A: Input tensor of shape (batch_size, m, k).
        B: Input tensor of shape (batch_size, k, n).

    Returns:
        C: Output tensor of shape (batch_size, m, n).
    """
    return torch.bmm(A, B)


class Model(nn.Module):
    """
    Performs batched matrix multiplication (C = A * B) where A, B, and C have the same batch dimension.
    """

    def __init__(self):
        super(Model, self).__init__()

    def forward(self, A: torch.Tensor, B: torch.Tensor, fn=module_fn) -> torch.Tensor:
        return fn(A, B)


batch_size = 128
m = 128
k = 256
n = 512


def get_inputs():
    A = torch.randn(batch_size, m, k)
    B = torch.randn(batch_size, k, n)
    return [A, B]


def get_init_inputs():
    return []  # No special initialization inputs needed
import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Performs batched matrix multiplication (C = A * B) where A, B, and C have the same batch dimension.
    """
    def __init__(self):
        super(Model, self).__init__()
    
    def forward(self, A: torch.Tensor, B: torch.Tensor) -> torch.Tensor:
        """
        Performs batched matrix multiplication.

        Args:
            A: Input tensor of shape (batch_size, m, k).
            B: Input tensor of shape (batch_size, k, n).

        Returns:
            C: Output tensor of shape (batch_size, m, n).
        """
        return torch.bmm(A, B)

batch_size = 128
m = 128
k = 256
n = 512

def get_inputs():
    A = torch.randn(batch_size, m, k)
    B = torch.randn(batch_size, k, n)
    return [A, B]

def get_init_inputs():
    return []  # No special initialization inputs needed

Kernel Information

Related Kernels (Level 1, Task 3 • 3_Batched_matrix_multiplication)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 bmm_tiled_shared_memory_optimized_edit_1 0.51 0.25 0.35
🥈 bmm_optimized_sync_reduction_base 0.51 0.25 0.35
🥈 optimized_bmm_kernel_base 0.51 0.25 0.35
🥈 optimized_bmm_kernel_base 0.51 0.25 0.35
🥈 bmm_warp_divergence_reduction_base 0.51 0.25 0.35
🥈 bmm_manual_unroll_base 0.51 0.25 0.35
🥈 bmm_unroll_pragma_optimized_base 0.51 0.25 0.35
8 bmm_optimized_tiling_base 0.51 0.25 0.35
8 bmm_thread_block_optimization_base 0.51 0.25 0.35
10 bmm_double_buffer_min_sync_base 0.52 0.25 0.35
11 bmm_cuda_streams_pipelining_base 0.52 0.25 0.35
12 aligned_ldg_bmm_opt_base 0.52 0.25 0.35
12 bmm_ldg_aligned_base 0.52 0.25 0.35
14 bmm_warp_uniform_base_base 0.52 0.25 0.35
14 bmm_shared_memory_optimized_base 0.52 0.25 0.35
16 bmm_thread_block_optimization_base 0.52 0.25 0.35
16 tiled_bmm_optimal_config_edit_1 0.52 0.25 0.35
16 bmm_warp_uniform_base 0.52 0.25 0.35
16 tiled_batchptr_unroll_base 0.52 0.25 0.35
16 warp_divergence_reduction_edit_1 0.52 0.25 0.35
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>

#define TILE 32

__global__ void bmm_tiled_shared_memory_kernel(
    const float* __restrict__ A,
    const float* __restrict__ B,
    float* __restrict__ C,
    int batch_size,
    int M,
    int K,
    int N
) {
    __shared__ float As[TILE][TILE];
    __shared__ float Bs[TILE][TILE];

    const int bx = blockIdx.x;
    const int by = blockIdx.y;
    const int bz = blockIdx.z;
    const int tx = threadIdx.x;
    const int ty = threadIdx.y;

    const int row = by * TILE + ty;
    const int col = bx * TILE + tx;

    float sum = 0.0f;
    float4 a_reg, b_reg;

    const int batch_offset_A = bz * M * K;
    const int batch_offset_B = bz * K * N;
    const int num_tiles = (K + TILE - 1) / TILE;

    int a_col = tx;
    int b_row = ty;
    
    // Main loop with prefetching
    for (int t = 0; t < num_tiles; t++) {
        // Load current tile
        if (row < M && (t * TILE + tx) < K) {
            As[ty][tx] = A[batch_offset_A + row * K + (t * TILE + tx)];
        } else {
            As[ty][tx] = 0.0f;
        }

        if ((t * TILE + ty) < K && col < N) {
            Bs[ty][tx] = B[batch_offset_B + (t * TILE + ty) * N + col];
        } else {
            Bs[ty][tx] = 0.0f;
        }

        __syncthreads();

        // Compute on current tile
        #pragma unroll
        for (int i = 0; i < TILE; i++) {
            sum = __fmaf_rn(As[ty][i], Bs[i][tx], sum);
        }

        __syncthreads();
    }

    if (row < M && col < N) {
        C[bz * M * N + row * N + col] = sum;
    }
}

torch::Tensor forward_bmm_shared_memory(torch::Tensor A, torch::Tensor B) {
    TORCH_CHECK(A.is_cuda(), "A must be a CUDA tensor");
    TORCH_CHECK(B.is_cuda(), "B must be a CUDA tensor");
    TORCH_CHECK(A.dim() == 3, "A must be 3D");
    TORCH_CHECK(B.dim() == 3, "B must be 3D");
    TORCH_CHECK(A.size(0) == B.size(0), "Batch sizes must match");
    TORCH_CHECK(A.size(2) == B.size(1), "Inner dimensions (K) must match");

    int batch_size = A.size(0);
    int M = A.size(1);
    int K = A.size(2);
    int N = B.size(2);

    auto options = torch::TensorOptions().dtype(A.dtype()).device(A.device());
    auto C = torch::zeros({batch_size, M, N}, options);

    dim3 threads(TILE, TILE);
    dim3 blocks((N + TILE - 1) / TILE, (M + TILE - 1) / TILE, batch_size);

    bmm_tiled_shared_memory_kernel<<<blocks, threads>>>(
        A.data_ptr<float>(),
        B.data_ptr<float>(),
        C.data_ptr<float>(),
        batch_size, M, K, N
    );

    return C;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &forward_bmm_shared_memory, "Batched matrix multiplication with shared memory optimization (CUDA)");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 1.680 inst/cycle 0.000 5
Executed Ipc Elapsed 1.656 inst/cycle 0.000 5
Issue Slots Busy 41.894 % 0.000 5
Issued Ipc Active 1.680 inst/cycle 0.000 5
SM Busy 41.894 % 0.000 5
Memory Throughput 184828052634.636 byte/second 25633315557618072.000 5
Mem Busy 87.348 % 0.002 5
Max Bandwidth 82.790 % 0.002 5
L1/TEX Hit Rate 0.024 % 0.000 5
L2 Hit Rate 73.032 % 0.519 5
Mem Pipes Busy 73.110 % 0.002 5
Warp Cycles Per Issued Instruction 37.478 cycle 0.000 5
Warp Cycles Per Executed Instruction 37.480 cycle 0.000 5
Avg. Active Threads Per Warp 32.000 0.000 5
Avg. Not Predicated Off Threads Per Warp 31.880 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 2.000 block 0.000 5
Block Limit Shared Mem 3.000 block 0.000 5
Block Limit Warps 2.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 98.222 % 0.000 5
Achieved Active Warps Per SM 62.864 warp 0.000 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
INF Occupancy This kernel's theoretical occupancy is not impacted by any block limit.
Operation / Metric Value Unit
aten::to
CPU Time 256701.08 μs
Device Time 8430.15 μs
Self CPU Time 47.59 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zeros
CPU Time 1148316.28 μs
Device Time 193510.30 μs
Self CPU Time 29511.01 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 9182281.54 μs
Device Time 1471390.76 μs
Self CPU Time 63430.66 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 9118851.84 μs
Device Time 1471390.76 μs
Self CPU Time 80368.17 μs
Self Device Time 1471390.76 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 9107215.00 μs
Device Time 546.65 μs
Self CPU Time 9107215.00 μs
Self Device Time 546.65 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
bmm_tiled_shared_memory_kernel(float const*, float const*, float*, int, int, int, int)
CPU Time 0.00 μs
Device Time 8231607.56 μs
Self CPU Time 0.00 μs
Self Device Time 8231607.56 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 1277880.47 μs
Self CPU Time 0.00 μs
Self Device Time 1277880.47 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed
45290 warnings generated when compiling for host.
Suppressed 45322 warnings (45275 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:8:5 bugprone-easily-swappable-parameters
8 | const float* __restrict__ A,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 | const float* __restrict__ B,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:8:31: note: the first parameter in the range is 'A'
8 | const float* __restrict__ A,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:9:31: note: the last parameter in the range is 'B'
9 | const float* __restrict__ B,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:11:5: warning: 2 adjacent parameters of 'bmm_tiled_shared_memory_kernel' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
11 | int batch_size,
| ^~~~~~~~~~~~~~~
12 | int M,
| ~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:11:9: note: the first parameter in the range is 'batch_size'
11 | int batch_size,
| ^~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:12:9: note: the last parameter in the range is 'M'
12 | int M,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:19:20: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
19 | const int bx = blockIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:20:20: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
20 | const int by = blockIdx.y;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:21:20: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
21 | const int bz = blockIdx.z;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:22:20: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
22 | const int tx = threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:23:20: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
23 | const int ty = threadIdx.y;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:35:9: warning: Value stored to 'a_col' during its initialization is never read [clang-analyzer-deadcode.DeadStores]
35 | int a_col = tx;
| ^~~~~ ~~
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:35:9: note: Value stored to 'a_col' during its initialization is never read
35 | int a_col = tx;
| ^~~~~ ~~
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:36:9: warning: Value stored to 'b_row' during its initialization is never read [clang-analyzer-deadcode.DeadStores]
36 | int b_row = ty;
| ^~~~~ ~~
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:36:9: note: Value stored to 'b_row' during its initialization is never read
36 | int b_row = ty;
| ^~~~~ ~~
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:69:55: warning: the parameter 'A' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
69 | torch::Tensor forward_bmm_shared_memory(torch::Tensor A, torch::Tensor B) {
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:69:72: warning: the parameter 'B' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
69 | torch::Tensor forward_bmm_shared_memory(torch::Tensor A, torch::Tensor B) {
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:77:22: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
77 | int batch_size = A.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:78:13: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
78 | int M = A.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:79:13: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
79 | int K = A.size(2);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_1/task_3/b5_s2_bmm_tiled_shared_memory_optimized/edit_1/edit_1.cu:80:13: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
80 | int N = B.size(2);
| ^