27_Conv3d_HardSwish_ReLU_Softmax_Mean
• constant_memory_optimization_edit_1
import torch
import torch.nn as nn
import torch.nn.functional as F
def module_fn(
x: torch.Tensor,
conv_weight: torch.Tensor,
conv_bias: torch.Tensor,
) -> torch.Tensor:
"""
Applies 3D convolution, HardSwish, ReLU, Softmax and mean reduction.
Args:
x (torch.Tensor): Input tensor of shape (batch_size, in_channels, depth, height, width)
conv_weight (torch.Tensor): 3D convolution weight tensor of shape
(out_channels, in_channels, kernel_size, kernel_size, kernel_size)
conv_bias (torch.Tensor): Bias tensor for 3D convolution of shape (out_channels)
Returns:
torch.Tensor: Output tensor after applying convolution, activations and reduction,
with shape (batch_size, out_channels)
"""
x = F.conv3d(x, conv_weight, bias=conv_bias)
x = F.hardswish(x)
x = F.relu(x)
x = F.softmax(x, dim=1)
x = torch.mean(x, dim=[2, 3, 4])
return x
class Model(nn.Module):
"""
Simple model that performs a 3D convolution, applies HardSwish, ReLU, Softmax, and then calculates the mean.
"""
def __init__(self, in_channels, out_channels, kernel_size):
super(Model, self).__init__()
conv = nn.Conv3d(in_channels, out_channels, kernel_size)
self.conv_weight = nn.Parameter(conv.weight)
self.conv_bias = nn.Parameter(conv.bias + torch.ones_like(conv.bias) * 0.02)
def forward(self, x, fn=module_fn):
return fn(x, self.conv_weight, self.conv_bias)
batch_size = 128
in_channels = 3
out_channels = 16
depth, height, width = 16, 32, 32
kernel_size = 3
def get_inputs():
return [torch.randn(batch_size, in_channels, depth, height, width)]
def get_init_inputs():
return [in_channels, out_channels, kernel_size]
import torch
import torch.nn as nn
class Model(nn.Module):
"""
Simple model that performs a 3D convolution, applies HardSwish, ReLU, Softmax, and then calculates the mean.
"""
def __init__(self, in_channels, out_channels, kernel_size, bias=True):
super(Model, self).__init__()
self.conv = nn.Conv3d(in_channels, out_channels, kernel_size, bias=bias)
self.conv.bias = nn.Parameter(self.conv.bias + torch.ones_like(self.conv.bias) * 0.02)
def forward(self, x):
x = self.conv(x)
x = torch.nn.functional.hardswish(x)
x = torch.relu(x)
x = torch.softmax(x, dim=1)
x = torch.mean(x, dim=[2, 3, 4])
return x
batch_size = 128
in_channels = 3
out_channels = 16
depth, height, width = 16, 32, 32
kernel_size = 3
def get_inputs():
return [torch.randn(batch_size, in_channels, depth, height, width)]
def get_init_inputs():
return [in_channels, out_channels, kernel_size]
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <cfloat>
#include <vector>
// Assuming some constant data that can be stored in constant memory
__constant__ float const_data[256]; // Adjust size and data as needed
// Optimized Fused HardSwish, ReLU, and Softmax kernel with constant memory
__global__ void optimized_fused_hardswish_relu_softmax_kernel(float* __restrict__ input, float* __restrict__ output,
int batch_size, int channels, int spatial_size) {
// Reorganize thread mapping for better memory coalescing
int tid = blockIdx.x * blockDim.x + threadIdx.x;
int stride = blockDim.x * gridDim.x;
int total_size = batch_size * channels * spatial_size;
// Process elements with stride for better parallelism
for (int i = tid; i < total_size; i += stride) {
int spatial_idx = i % spatial_size;
int tmp = i / spatial_size;
int c = tmp % channels;
int batch_idx = tmp / channels;
if (batch_idx >= batch_size) continue;
// Calculate input value
float x = input[i];
float relu6 = fminf(fmaxf(x + 3.0f, 0.0f), 6.0f);
float hswish = x * relu6 / 6.0f;
float val = fmaxf(hswish, 0.0f);
// Store intermediate result
input[i] = val;
}
__syncthreads();
// Process per batch and spatial location
for (int idx = tid; idx < batch_size * spatial_size; idx += stride) {
int batch_idx = idx / spatial_size;
int spatial_idx = idx % spatial_size;
// Find max value
float max_val = -FLT_MAX;
for (int c = 0; c < channels; ++c) {
int full_idx = batch_idx * channels * spatial_size + c * spatial_size + spatial_idx;
max_val = fmaxf(max_val, input[full_idx]);
}
// Compute exponential sum
float sum_exp = 0.0f;
for (int c = 0; c < channels; ++c) {
int full_idx = batch_idx * channels * spatial_size + c * spatial_size + spatial_idx;
float exp_val = expf(input[full_idx] - max_val);
sum_exp += exp_val;
output[full_idx] = exp_val;
}
// Normalize
for (int c = 0; c < channels; ++c) {
int full_idx = batch_idx * channels * spatial_size + c * spatial_size + spatial_idx;
output[full_idx] = output[full_idx] / sum_exp;
}
}
}
// Module forward function
torch::Tensor module_forward(
torch::Tensor x,
torch::Tensor conv_weight,
torch::Tensor conv_bias) {
// Ensure all tensors are contiguous and on CUDA
x = x.contiguous().cuda();
conv_weight = conv_weight.contiguous().cuda();
conv_bias = conv_bias.contiguous().cuda();
// Perform 3D convolution
x = torch::conv3d(x, conv_weight, conv_bias);
// Get dimensions
int64_t batch_size = x.size(0);
int64_t channels = x.size(1);
int64_t depth = x.size(2);
int64_t height = x.size(3);
int64_t width = x.size(4);
int64_t spatial_size = depth * height * width;
// Prepare tensor for softmax
x = x.view({batch_size, channels, spatial_size});
torch::Tensor x_softmax = torch::empty_like(x);
// Launch optimized fused kernel with an optimized block size (512 threads per block)
int total_elements = batch_size * spatial_size;
int threads = 512;
int blocks = (total_elements + threads - 1) / threads;
optimized_fused_hardswish_relu_softmax_kernel<<<blocks, threads>>>(
x.data_ptr<float>(), x_softmax.data_ptr<float>(),
batch_size, channels, spatial_size);
// Compute mean over spatial dimensions to get final output
torch::Tensor output = x_softmax.view({batch_size, channels, depth, height, width}).mean({2, 3, 4});
return output;
}
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
m.def("forward", &module_forward, "Optimized Fused HardSwish, ReLU, and Softmax with constant memory forward");
}
Metric | Value | Unit | Variance | Samples |
---|---|---|---|---|
Executed Ipc Active | 1.800 | inst/cycle | 0.000 | 5 |
Executed Ipc Elapsed | 1.736 | inst/cycle | 0.000 | 5 |
Issue Slots Busy | 45.030 | % | 0.023 | 5 |
Issued Ipc Active | 1.802 | inst/cycle | 0.000 | 5 |
SM Busy | 45.720 | % | 0.025 | 5 |
Memory Throughput | 2227297430174.265 | byte/second | 56557422209489813504.000 | 5 |
Mem Busy | 43.928 | % | 0.016 | 5 |
Max Bandwidth | 66.462 | % | 0.052 | 5 |
L1/TEX Hit Rate | 59.236 | % | 0.000 | 5 |
L2 Hit Rate | 65.956 | % | 0.000 | 5 |
Mem Pipes Busy | 16.620 | % | 0.006 | 5 |
Warp Cycles Per Issued Instruction | 31.582 | cycle | 0.014 | 5 |
Warp Cycles Per Executed Instruction | 31.604 | cycle | 0.015 | 5 |
Avg. Active Threads Per Warp | 32.000 | 0.000 | 5 | |
Avg. Not Predicated Off Threads Per Warp | 27.820 | 0.000 | 5 | |
Max Active Clusters | 0.000 | cluster | 0.000 | 5 |
Max Cluster Size | 8.000 | block | 0.000 | 5 |
Overall GPU Occupancy | 0.000 | % | 0.000 | 5 |
Cluster Occupancy | 0.000 | % | 0.000 | 5 |
Block Limit SM | 32.000 | block | 0.000 | 5 |
Block Limit Registers | 4.000 | block | 0.000 | 5 |
Block Limit Shared Mem | 16.000 | block | 0.000 | 5 |
Block Limit Warps | 4.000 | block | 0.000 | 5 |
Theoretical Active Warps per SM | 64.000 | warp | 0.000 | 5 |
Theoretical Occupancy | 100.000 | % | 0.000 | 5 |
Achieved Occupancy | 88.810 | % | 0.014 | 5 |
Achieved Active Warps Per SM | 56.840 | warp | 0.006 | 5 |
Rule | Description |
---|---|
INF HighPipeUtilization | ALU is the highest-utilized pipeline (45.5%) based on active cycles, taking into account the rates of its different instructions. It executes integer and logic operations. It is well-utilized, but should not be a bottleneck. |
INF CPIStall | Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason. |
WRN Occupancy | This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (88.7%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy. |
Operation / Metric | Value | Unit |
---|---|---|
aten::conv3d | ||
CPU Time | 3854822.83 | μs |
Device Time | 3944078.65 | μs |
Self CPU Time | 12065.93 | μs |
Self Device Time | 0.00 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
aten::convolution | ||
CPU Time | 3842756.90 | μs |
Device Time | 3944078.65 | μs |
Self CPU Time | 14377.02 | μs |
Self Device Time | 0.00 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
aten::_convolution | ||
CPU Time | 3828379.88 | μs |
Device Time | 3944078.65 | μs |
Self CPU Time | 32959.28 | μs |
Self Device Time | 0.00 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
aten::cudnn_convolution | ||
CPU Time | 3292793.44 | μs |
Device Time | 3423562.74 | μs |
Self CPU Time | 155309.43 | μs |
Self Device Time | 3423562.74 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
cudaLaunchKernelExC | ||
CPU Time | 3110705.05 | μs |
Device Time | 0.00 | μs |
Self CPU Time | 3110705.05 | μs |
Self Device Time | 0.00 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
sm80_xmma_fprop_implicit_gemm_indexed_f32f32_f32f32_f32_nchwkcrs_nchw_tilesize32x32x8_stage3_warpsize1x2x1_g1_ffma_aligna4_alignc4_execute_kernel__5x_cudnn | ||
CPU Time | 0.00 | μs |
Device Time | 3423561.24 | μs |
Self CPU Time | 0.00 | μs |
Self Device Time | 3423561.24 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
45285 warnings generated when compiling for host. Suppressed 45323 warnings (45276 in non-user code, 47 NOLINT). Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.