← Back to Leaderboard

The AI CUDA Engineer 👷

80_Gemm_Max_Subtract_GELU • warp_aligned_gemm_const_bias_base

Level 2 • Task 80
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    max_dim: int,
    weight: torch.Tensor,
    bias: torch.Tensor,
) -> torch.Tensor:
    """
    Performs a GEMM, followed by a max operation, subtraction, and GELU activation.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_features)
        max_dim (int): Dimension to perform max operation over
        weight (torch.Tensor): Weight matrix of shape (out_features, in_features)
        bias (torch.Tensor): Bias vector of shape (out_features)

    Returns:
        torch.Tensor: Output tensor of shape (batch_size, out_features)
    """
    x = F.linear(x, weight, bias)
    x = torch.max(x, dim=max_dim, keepdim=True).values
    x = x - x.mean(dim=1, keepdim=True)
    x = F.gelu(x)
    return x


class Model(nn.Module):
    """
    Model that performs a GEMM, followed by a max operation, subtraction, and GELU activation.
    """

    def __init__(self, in_features, out_features, max_dim):
        super(Model, self).__init__()
        gemm = nn.Linear(in_features, out_features)
        self.weight = nn.Parameter(gemm.weight)
        self.bias = nn.Parameter(gemm.bias)

    def forward(self, x, max_dim, fn=module_fn):
        return fn(x, max_dim, self.weight, self.bias)


batch_size = 128
in_features = 512
out_features = 1024
max_dim = 1


def get_inputs():
    return [torch.randn(batch_size, in_features), max_dim]


def get_init_inputs():
    return [in_features, out_features, max_dim]

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Model that performs a GEMM, followed by a max operation, subtraction, and GELU activation.
    """
    def __init__(self, in_features, out_features, max_dim):
        super(Model, self).__init__()
        self.gemm = nn.Linear(in_features, out_features)
        self.max_dim = max_dim

    def forward(self, x):
        """
        Args:
            x: Input tensor of shape (batch_size, in_features)

        Returns:
            Output tensor of shape (batch_size, out_features)
        """
        x = self.gemm(x)
        x = torch.max(x, dim=self.max_dim, keepdim=True).values
        x = x - x.mean(dim=1, keepdim=True)
        x = torch.nn.functional.gelu(x)
        return x

batch_size = 128
in_features = 512
out_features = 1024
max_dim = 1

def get_inputs():
    return [torch.randn(batch_size, in_features)]

def get_init_inputs():
    return [in_features, out_features, max_dim]
Download Evaluation Download PyTorch Download CUDA Download Profiles

Kernel Information

Operation Name 80_Gemm_Max_Subtract_GELU
Level ID 2
Task ID 80
Kernel Name warp_aligned_gemm_const_bias_base
CUDA Speedup (Native) 1.468x
CUDA Speedup (Compile) 1.559x
CUDA Runtime 0.029 ms
PyTorch Runtime (Native) 0.043 ms
PyTorch Runtime (Compile) 0.045 ms
Correct True
Max Diff (vs. Reference) 0.000000
Model o3-mini-2025-01-31
Temperature 1.00
View Experiment Progress Details

Related Kernels (Level 2, Task 80 • 80_Gemm_Max_Subtract_GELU)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 warp_optimized_gemm_max_gelu_base 0.03 1.70 1.81
🥇 warp_optimized_shared_memory_edit_1 0.03 1.70 1.81
🥇 warp_aligned_gemm_base_edit_1 0.03 1.70 1.81
🥇 warp_optimized_shared_memory_base 0.03 1.70 1.81
🥇 warp_balanced_gemm_optimization_base 0.03 1.70 1.81
6 warp_aligned_gemm_base_base 0.03 1.58 1.67
7 warp_aligned_gemm_const_bias_base 0.03 1.47 1.56
8 warp_aligned_gemm_const_bias_edit_1 0.03 1.25 1.33
8 ldg_memory_optimized_kernel_base 0.03 1.25 1.33
10 indexing_optimized_fused_kernel_base 0.04 1.22 1.29
10 workload_balanced_kernel_base_base 0.04 1.22 1.29
10 shared_memory_reduction_warp_optimization_base_base 0.04 1.22 1.29
10 efficient_thread_mapping_kernel_base 0.04 1.22 1.29
14 block_tuned_fused_kernel_base_base 0.04 1.18 1.26
14 minimal_sync_optimized_kernel_base_base 0.04 1.18 1.26
16 warp_balanced_gemm_optimization_edit_1 0.04 1.15 1.22
17 warp_optimized_reduction_base_base 0.04 1.09 1.16
18 evenly_distributed_base 0.04 1.06 1.13
18 fused_gemm_max_reduce_gelu_base 0.04 1.06 1.13
20 fused_stride_loops_base 0.04 1.04 1.10 
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <math.h>
#include <float.h>

#define WARP_SIZE 32
#define BLOCK_SIZE 256
#define TILE_DIM 32  // Aligned with warp size
#define MAX_BIAS_SIZE 16384

// Store the frequently accessed bias vector in constant memory
__constant__ float d_bias_const[MAX_BIAS_SIZE];

// Fast GELU approximation using CUDA intrinsics
__device__ inline float gelu(float x) {
    const float a = 0.797884560802865f; // sqrt(2/M_PI)
    const float b = 0.044715f;
    float cdf = 0.5f * (1.0f + tanhf(a * (x + b * x * x * x)));
    return x * cdf;
}

// Warp-aligned GEMM kernel with bias stored in constant memory
__global__ void warp_aligned_gemm_kernel(const float* __restrict__ x,
                                          const float* __restrict__ weight,
                                          float* __restrict__ y,
                                          int batch, int in_features, int out_features) {
    __shared__ float tile_x[TILE_DIM][TILE_DIM];
    __shared__ float tile_w[TILE_DIM][TILE_DIM];

    const int warp_id = threadIdx.x / WARP_SIZE;
    const int lane_id = threadIdx.x % WARP_SIZE;
    
    const int row = blockIdx.y * TILE_DIM + warp_id;
    const int col = blockIdx.x * TILE_DIM + lane_id;
    
    float sum = 0.0f;

    for (int t = 0; t < (in_features + TILE_DIM - 1) / TILE_DIM; t++) {
        const int tile_x_col = t * TILE_DIM + lane_id;
        const int tile_w_row = t * TILE_DIM + warp_id;
        
        if (row < batch && tile_x_col < in_features)
            tile_x[warp_id][lane_id] = x[row * in_features + tile_x_col];
        else
            tile_x[warp_id][lane_id] = 0.0f;
        
        if (col < out_features && tile_w_row < in_features)
            tile_w[warp_id][lane_id] = weight[col * in_features + tile_w_row];
        else
            tile_w[warp_id][lane_id] = 0.0f;
        
        __syncthreads();

        #pragma unroll
        for (int k = 0; k < TILE_DIM; k++) {
            sum += tile_x[warp_id][k] * tile_w[k][lane_id];
        }
        
        __syncthreads();
    }

    if (row < batch && col < out_features) {
        // Use the bias stored in constant memory
        y[row * out_features + col] = sum + d_bias_const[col];
    }
}

// Warp-synchronized max reduction kernel
__global__ void warp_reduce_max_kernel(const float* __restrict__ input,
                                         float* __restrict__ output,
                                         int rows, int cols, int reduce_dim) {
    __shared__ float shared_data[BLOCK_SIZE];
    
    const int tid = threadIdx.x;
    const int lane_id = tid % WARP_SIZE;
    const int warp_id = tid / WARP_SIZE;
    
    float max_val = -FLT_MAX;
    
    if (reduce_dim == 0) {
        // Reduction along rows (batch dimension)
        const int col = blockIdx.x * WARP_SIZE + lane_id;
        if (col < cols) {
            for (int row = 0; row < rows; row += BLOCK_SIZE) {
                if (row + tid < rows) {
                    max_val = fmaxf(max_val, input[(row + tid) * cols + col]);
                }
            }
        }
    } else {
        // Reduction along columns (feature dimension)
        const int row = blockIdx.x;
        for (int col = tid; col < cols; col += BLOCK_SIZE) {
            if (col < cols) {
                max_val = fmaxf(max_val, input[row * cols + col]);
            }
        }
    }
    
    shared_data[tid] = max_val;
    __syncthreads();
    
    if (tid < WARP_SIZE) {
        #pragma unroll
        for (int offset = WARP_SIZE/2; offset > 0; offset /= 2) {
            max_val = fmaxf(max_val, __shfl_down_sync(0xffffffff, max_val, offset));
        }
        
        if (lane_id == 0) {
            if (reduce_dim == 0) {
                output[blockIdx.x * WARP_SIZE + warp_id] = max_val;
            } else if (warp_id == 0) {
                output[blockIdx.x] = max_val;
            }
        }
    }
}

// Fused kernel to compute row-wise mean, subtract the mean, and apply GELU activation
__global__ void warp_fused_mean_gelu_kernel(float* __restrict__ data,
                                              int rows, int cols) {
    __shared__ float warp_sums[WARP_SIZE];
    
    const int row = blockIdx.x;
    const int tid = threadIdx.x;
    const int lane_id = tid % WARP_SIZE;
    const int warp_id = tid / WARP_SIZE;
    
    float sum = 0.0f;
    for (int col = tid; col < cols; col += blockDim.x) {
        sum += data[row * cols + col];
    }
    
    #pragma unroll
    for (int offset = WARP_SIZE/2; offset > 0; offset /= 2) {
        sum += __shfl_down_sync(0xffffffff, sum, offset);
    }
    
    if (lane_id == 0) {
        warp_sums[warp_id] = sum;
    }
    __syncthreads();
    
    if (tid == 0) {
        float total_sum = 0.0f;
        for (int i = 0; i < (blockDim.x + WARP_SIZE - 1) / WARP_SIZE; i++) {
            total_sum += warp_sums[i];
        }
        warp_sums[0] = total_sum / cols;
    }
    __syncthreads();
    
    const float mean = warp_sums[0];
    for (int col = tid; col < cols; col += blockDim.x) {
        float val = data[row * cols + col] - mean;
        data[row * cols + col] = gelu(val);
    }
}

// Forward function combining the kernels
torch::Tensor forward(torch::Tensor x, int max_dim, torch::Tensor weight, torch::Tensor bias) {
    const int batch = x.size(0);
    const int in_features = x.size(1);
    const int out_features = weight.size(0);

    if (out_features > MAX_BIAS_SIZE) {
        throw std::runtime_error("Bias vector size exceeds constant memory limit");
    }

    // Copy the bias tensor into constant memory
    cudaMemcpyToSymbol(d_bias_const, bias.data_ptr<float>(), out_features * sizeof(float));

    auto y = torch::empty({batch, out_features}, x.options());
    
    dim3 block(BLOCK_SIZE);
    dim3 grid((out_features + TILE_DIM - 1) / TILE_DIM,
              (batch + TILE_DIM - 1) / TILE_DIM);
    
    warp_aligned_gemm_kernel<<<grid, block>>>(
        x.data_ptr<float>(), weight.data_ptr<float>(),
        y.data_ptr<float>(), batch, in_features, out_features);

    auto max_out = (max_dim == 0) ?
        torch::empty({1, out_features}, y.options()) :
        torch::empty({batch, 1}, y.options());
    
    const int rows = (max_dim == 0) ? batch : 1;
    const int cols = (max_dim == 0) ? out_features : batch;
    
    dim3 reduce_grid((cols + WARP_SIZE - 1) / WARP_SIZE);
    warp_reduce_max_kernel<<<reduce_grid, BLOCK_SIZE>>>(
        y.data_ptr<float>(), max_out.data_ptr<float>(),
        batch, out_features, max_dim);

    const int final_rows = max_out.size(0);
    const int final_cols = max_out.size(1);
    
    warp_fused_mean_gelu_kernel<<<final_rows, BLOCK_SIZE>>>(
        max_out.data_ptr<float>(), final_rows, final_cols);

    return max_out;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &forward, "Warp-aligned CUDA forward with constant memory bias");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.168 inst/cycle 0.000 5
Executed Ipc Elapsed 0.060 inst/cycle 0.000 5
Issue Slots Busy 4.428 % 0.025 5
Issued Ipc Active 0.176 inst/cycle 0.000 5
SM Busy 4.428 % 0.025 5
Memory Throughput 1504169845.812 byte/second 3761869558478741.000 5
Mem Busy 8.598 % 0.107 5
Max Bandwidth 4.440 % 0.034 5
L1/TEX Hit Rate 66.670 % 0.000 5
L2 Hit Rate 101.692 % 0.017 5
Mem Pipes Busy 2.364 % 0.009 5
Warp Cycles Per Issued Instruction 38.946 cycle 0.072 5
Warp Cycles Per Executed Instruction 40.956 cycle 0.080 5
Avg. Active Threads Per Warp 24.080 0.000 5
Avg. Not Predicated Off Threads Per Warp 18.660 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 10.000 block 0.000 5
Block Limit Shared Mem 28.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 11.032 % 0.003 5
Achieved Active Warps Per SM 7.058 warp 0.001 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN ThreadDivergence Instructions are executed in warps, which are groups of 32 threads. Optimal instruction throughput is achieved if all 32 threads of a warp execute the same instruction. The chosen launch configuration, early thread completion, and divergent flow control can significantly lower the number of active threads in a warp per cycle. This kernel achieves an average of 24.1 threads being active per cycle. This is further reduced to 18.7 threads per warp due to predication. The compiler may use predication to avoid an actual branch. Instead, all instructions are scheduled, but a per-thread condition code or predicate controls which threads execute the instructions. Try to avoid different execution paths within a warp when possible. In addition, ensure your kernel makes use of Independent Thread Scheduling, which allows a warp to reconverge after a data-dependent conditional block by explicitly calling __syncwarp().
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (11.0%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 509955.64 μs
Device Time 165.18 μs
Self CPU Time 61.25 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 509894.39 μs
Device Time 165.18 μs
Self CPU Time 138.00 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 509293.25 μs
Device Time 0.00 μs
Self CPU Time 122.79 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 506979.59 μs
Device Time 0.00 μs
Self CPU Time 506979.59 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 536030.46 μs
Device Time 37268.11 μs
Self CPU Time 536030.46 μs
Self Device Time 37268.11 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
warp_aligned_gemm_kernel(float const*, float const*, float*, int, int, int)
CPU Time 0.00 μs
Device Time 120747.83 μs
Self CPU Time 0.00 μs
Self Device Time 120747.83 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 494164.58 μs
Device Time 578909.74 μs
Self CPU Time 13373.11 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 480793.19 μs
Device Time 578909.74 μs
Self CPU Time 18236.97 μs
Self Device Time 578909.74 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 578909.74 μs
Self CPU Time 0.00 μs
Self Device Time 578909.74 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed 
45301 warnings generated when compiling for host.
Suppressed 45324 warnings (45277 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:24:42 bugprone-easily-swappable-parameters
24 | __global__ void warp_aligned_gemm_kernel(const float* __restrict__ x,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 | const float* __restrict__ weight,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:24:68: note: the first parameter in the range is 'x'
24 | __global__ void warp_aligned_gemm_kernel(const float* __restrict__ x,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:25:69: note: the last parameter in the range is 'weight'
25 | const float* __restrict__ weight,
| ^~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:31:25: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
31 | const int warp_id = threadIdx.x / WARP_SIZE;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:32:25: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
32 | const int lane_id = threadIdx.x % WARP_SIZE;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:34:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
34 | const int row = blockIdx.y * TILE_DIM + warp_id;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:35:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
35 | const int col = blockIdx.x * TILE_DIM + lane_id;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:72:42: warning: 3 adjacent parameters of 'warp_reduce_max_kernel' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
72 | int rows, int cols, int reduce_dim) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:72:46: note: the first parameter in the range is 'rows'
72 | int rows, int cols, int reduce_dim) {
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:72:66: note: the last parameter in the range is 'reduce_dim'
72 | int rows, int cols, int reduce_dim) {
| ^~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:75:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
75 | const int tid = threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:83:25: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
83 | const int col = blockIdx.x * WARP_SIZE + lane_id;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:93:25: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
93 | const int row = blockIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:122:47: warning: 2 adjacent parameters of 'warp_fused_mean_gelu_kernel' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
122 | int rows, int cols) {
| ^~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:122:51: note: the first parameter in the range is 'rows'
122 | int rows, int cols) {
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:122:61: note: the last parameter in the range is 'cols'
122 | int rows, int cols) {
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:125:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
125 | const int row = blockIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:126:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
126 | const int tid = threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:131:44: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
131 | for (int col = tid; col < cols; col += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:150:36: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
150 | warp_sums[0] = total_sum / cols;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:155:44: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
155 | for (int col = tid; col < cols; col += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:162:37: warning: the parameter 'x' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
162 | torch::Tensor forward(torch::Tensor x, int max_dim, torch::Tensor weight, torch::Tensor bias) {
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:162:67: warning: the parameter 'weight' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
162 | torch::Tensor forward(torch::Tensor x, int max_dim, torch::Tensor weight, torch::Tensor bias) {
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:162:89: warning: the parameter 'bias' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
162 | torch::Tensor forward(torch::Tensor x, int max_dim, torch::Tensor weight, torch::Tensor bias) {
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:163:23: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
163 | const int batch = x.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:164:29: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
164 | const int in_features = x.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:165:30: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
165 | const int out_features = weight.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:188:15: warning: Value stored to 'rows' during its initialization is never read [clang-analyzer-deadcode.DeadStores]
188 | const int rows = (max_dim == 0) ? batch : 1;
| ^~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:188:15: note: Value stored to 'rows' during its initialization is never read
188 | const int rows = (max_dim == 0) ? batch : 1;
| ^~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:196:28: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
196 | const int final_rows = max_out.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_80/b3_s1_warp_aligned_gemm_const_bias/base/base.cu:197:28: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
197 | const int final_cols = max_out.size(1);
| ^