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35_LTSMfused_tiled_base

Level 3 • Task 35
import torch
import torch.nn as nn
import torch.nn.functional as F
from torch import _VF


def module_fn(
    x: torch.Tensor,
    lstm_weights_ih: torch.Tensor,
    lstm_weights_hh: torch.Tensor,
    lstm_biases_ih: torch.Tensor,
    lstm_biases_hh: torch.Tensor,
    fc_weight: torch.Tensor,
    fc_bias: torch.Tensor,
    h0: torch.Tensor,
    c0: torch.Tensor,
    is_training: bool,
) -> torch.Tensor:
    """
    LSTM forward pass

    Args:
        x: Input tensor of shape (batch_size, sequence_length, input_size)
        lstm_weights_ih: List of input-hidden weight tensors for each LSTM layer
        lstm_weights_hh: List of hidden-hidden weight tensors for each LSTM layer
        lstm_biases_ih: List of input-hidden bias tensors for each LSTM layer
        lstm_biases_hh: List of hidden-hidden bias tensors for each LSTM layer
        fc_weight: Weight tensor for final linear layer
        fc_bias: Bias tensor for final linear layer
        h0: Initial hidden state
        c0: Initial cell state
        is_training: Whether in training mode

    Returns:
        Output tensor of shape (batch_size, output_size)
    """
    h0 = h0.to(x.device)
    c0 = c0.to(x.device)

    # Run LSTM layers
    out = x

    for i in range(len(lstm_weights_ih)):
        params = (
            lstm_weights_ih[i],
            lstm_weights_hh[i],
            lstm_biases_ih[i],
            lstm_biases_hh[i],
        )
        out = _VF.lstm(
            out,
            (h0[i : i + 1], c0[i : i + 1]),
            params,
            True,  # has_biases
            1,  # num_layers
            0.0 if not is_training else dropout,  # dropout
            is_training,  # training
            False,  # bidirectional
            True,
        )[
            0
        ]  # batch_first, only keep output

    # Get last timestep and apply final linear layer
    out = F.linear(out[:, -1, :], fc_weight, fc_bias)

    return out


class Model(nn.Module):
    def __init__(self, input_size, hidden_size, num_layers, output_size, dropout=0.0):
        """
        Initialize the LSTM model.

        :param input_size: The number of expected features in the input `x`
        :param hidden_size: The number of features in the hidden state `h`
        :param num_layers: Number of recurrent layers
        :param output_size: The number of output features
        :param dropout: If non-zero, introduces a Dropout layer on the outputs of each LSTM layer except the last layer
        """
        super(Model, self).__init__()

        # Initialize hidden states
        self.h0 = torch.randn((num_layers, batch_size, hidden_size))
        self.c0 = torch.randn((num_layers, batch_size, hidden_size))

        # Extract LSTM parameters
        lstm = nn.LSTM(
            input_size,
            hidden_size,
            num_layers,
            batch_first=True,
            dropout=dropout,
            bidirectional=False,
        )

        # Get weights and biases for each layer
        self.lstm_weights_ih = nn.ParameterList()
        self.lstm_weights_hh = nn.ParameterList()
        self.lstm_biases_ih = nn.ParameterList()
        self.lstm_biases_hh = nn.ParameterList()

        for i in range(num_layers):
            self.lstm_weights_ih.append(
                nn.Parameter(getattr(lstm, f"weight_ih_l{i}").data.clone())
            )
            self.lstm_weights_hh.append(
                nn.Parameter(getattr(lstm, f"weight_hh_l{i}").data.clone())
            )
            self.lstm_biases_ih.append(
                nn.Parameter(getattr(lstm, f"bias_ih_l{i}").data.clone())
            )
            self.lstm_biases_hh.append(
                nn.Parameter(getattr(lstm, f"bias_hh_l{i}").data.clone())
            )

        # Extract linear layer parameters
        fc = nn.Linear(hidden_size, output_size)
        self.fc_weight = nn.Parameter(fc.weight.data.clone())
        self.fc_bias = nn.Parameter(fc.bias.data.clone())

    def forward(self, x, fn=module_fn):
        return fn(
            x,
            self.lstm_weights_ih,
            self.lstm_weights_hh,
            self.lstm_biases_ih,
            self.lstm_biases_hh,
            self.fc_weight,
            self.fc_bias,
            self.h0,
            self.c0,
            self.training,
        )


# Test code
batch_size = 10
sequence_length = 512
input_size = 128
hidden_size = 256
num_layers = 6
output_size = 10
dropout = 0.0


def get_inputs():
    return [torch.randn(batch_size, sequence_length, input_size)]


def get_init_inputs():
    return [input_size, hidden_size, num_layers, output_size, dropout]
import torch
import torch.nn as nn

class Model(nn.Module):
    def __init__(self, input_size, hidden_size, num_layers, output_size, dropout=0.0):
        """
        Initialize the LSTM model.

        :param input_size: The number of expected features in the input `x`
        :param hidden_size: The number of features in the hidden state `h`
        :param num_layers: Number of recurrent layers
        :param output_size: The number of output features
        :param dropout: If non-zero, introduces a Dropout layer on the outputs of each LSTM layer except the last layer, with dropout probability equal to `dropout`
        """
        super(Model, self).__init__()
        # Initialize hidden state with random values
        self.h0 = torch.randn((num_layers, batch_size, hidden_size))
        self.c0 = torch.randn((num_layers, batch_size, hidden_size))
        self.lstm = nn.LSTM(input_size, hidden_size, num_layers, batch_first=True, dropout=dropout, bidirectional=False)
        self.fc = nn.Linear(hidden_size, output_size)
    
    def forward(self, x):
        """
        Forward pass through the LSTM model.

        :param x: The input tensor, shape (batch_size, sequence_length, input_size)
        :return: The output tensor, shape (batch_size, sequence_length, output_size)
        """
        self.h0 = self.h0.to(x.device)
        self.c0 = self.h0.to(x.device)
        
        # Forward propagate LSTM
        out, hn = self.lstm(x, (self.h0, self.c0))  # out: tensor of shape (batch_size, seq_length, hidden_size)
        
        # Decode the hidden state of the last time step
        out = self.fc(out[:, -1, :])  # out: tensor of shape (batch_size, output_size)
        
        return out

# Test code
batch_size = 10
sequence_length = 512
input_size = 128
hidden_size = 256
num_layers = 6
output_size = 10
dropout = 0.0

def get_inputs():
    return [torch.randn(batch_size, sequence_length, input_size)]

def get_init_inputs():
    return [input_size, hidden_size, num_layers, output_size, dropout]

Kernel Information

Related Kernels (Level 3, Task 35 • 35_LTSM)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 35_lstm_grid_stride_base_base 72.97 0.44 0.83
🥈 35_lstm_modular_device_edit_1 75.07 0.43 0.81
🥉 35_lstm_shared_memory_base 86.54 0.37 0.70
4 35_lstm_atomic_reduction_base_base 86.99 0.37 0.69
5 35_lstm_workload_balanced_base 87.77 0.36 0.69
6 35_lstm_aligned_base 88.03 0.36 0.69
7 35_lstm_tiled_unroll_edit_1 88.19 0.36 0.69
8 35_lstm_load_balancing_base 88.28 0.36 0.68
9 fused_tiled_base 88.40 0.36 0.68
10 35_lstm_ldg_aligned_v2_base 88.50 0.36 0.68
11 35_lstm_load_balancing_edit_1 88.68 0.36 0.68
12 35_LTSM 88.90 0.36 0.68
13 35_lstm_memory_coalescing_edit_1 89.05 0.36 0.68
14 modular_35_ltsm_base 89.17 0.36 0.68
15 35_lstm_shared_memory_edit_1 89.34 0.36 0.68
16 fused_tiled_edit_1 89.35 0.36 0.68
17 35_lstm_unrolled_base 89.58 0.36 0.67
18 35_lstm_memory_coalescing_base 89.77 0.36 0.67
19 35_lstm_warp_reduce_base 89.78 0.36 0.67
20 35_lstm_warp_aligned_base 89.81 0.36 0.67
#include <torch/extension.h>
#include <vector>
#include <cmath>

// Device helper functions for activations
__device__ inline float device_sigmoid(float x) {
    return 1.0f / (1.0f + expf(-x));
}

__device__ inline float device_tanh(float x) {
    return tanhf(x);
}

// Modular device function for LSTM cell computation
__device__ inline void compute_lstm_cell(const float* __restrict__ gates,
                                          int gate_base,
                                          float prev_c,
                                          int hidden_size,
                                          float &h_out,
                                          float &c_out) {
    float i_gate = device_sigmoid(gates[gate_base]);
    float f_gate = device_sigmoid(gates[gate_base + hidden_size]);
    float g_gate = device_tanh(gates[gate_base + 2 * hidden_size]);
    float o_gate = device_sigmoid(gates[gate_base + 3 * hidden_size]);
    float c_new = f_gate * prev_c + i_gate * g_gate;
    h_out = o_gate * device_tanh(c_new);
    c_out = c_new;
}

// CUDA kernel for element-wise LSTM computations
__global__ void lstm_elementwise_forward_modular(
    const float* __restrict__ gates,
    const float* __restrict__ prev_c,
    float* __restrict__ h,
    float* __restrict__ c,
    int batch_size,
    int hidden_size
) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < batch_size * hidden_size) {
        int b = idx / hidden_size;
        int n = idx % hidden_size;
        int gate_base = b * hidden_size * 4 + n;

        float h_val, c_val;
        compute_lstm_cell(gates, gate_base, prev_c[idx], hidden_size, h_val, c_val);
        h[idx] = h_val;
        c[idx] = c_val;
    }
}

// Tiled linear forward kernel using shared memory reduction
// Grid dimensions: grid.x = batch index, grid.y = output index
__global__ void linear_forward_kernel_tiled(
    const float* __restrict__ input,
    const float* __restrict__ weight,
    const float* __restrict__ bias,
    float* __restrict__ output,
    int input_dim
) {
    int batch_idx = blockIdx.x;  // Each block row corresponds to a unique batch element
    int out_idx   = blockIdx.y;  // Each block column corresponds to a unique output neuron
    int tid = threadIdx.x;
    float sum = 0.0f;

    // Each thread computes partial dot product across the input dimension
    for (int k = tid; k < input_dim; k += blockDim.x) {
        sum += input[batch_idx * input_dim + k] * weight[out_idx * input_dim + k];
    }

    // Shared memory reduction
    extern __shared__ float shmem[];
    shmem[tid] = sum;
    __syncthreads();

    // Reduction in shared memory
    for (int s = blockDim.x / 2; s > 0; s >>= 1) {
        if (tid < s) {
            shmem[tid] += shmem[tid + s];
        }
        __syncthreads();
    }

    // Write final result to global memory
    if (tid == 0) {
        float res = shmem[0];
        if (bias != nullptr) {
            res += bias[out_idx];
        }
        // Using gridDim.y as the output dimension stride
        output[batch_idx * gridDim.y + out_idx] = res;
    }
}

// Function to compute LSTM forward pass using the modular kernel
torch::Tensor lstm_forward_cuda(
    torch::Tensor input,
    torch::Tensor w_ih,
    torch::Tensor w_hh,
    torch::Tensor b_ih,
    torch::Tensor b_hh,
    torch::Tensor h0,
    torch::Tensor c0
) {
    auto options = torch::TensorOptions().dtype(input.dtype()).device(input.device());
    int batch_size = input.size(0);
    int seq_len = input.size(1);
    int hidden_size = h0.size(1);

    torch::Tensor h = h0.clone();
    torch::Tensor c = c0.clone();

    std::vector<torch::Tensor> outputs;

    for (int t = 0; t < seq_len; ++t) {
        // Get input at timestep t
        torch::Tensor xt = input.select(1, t);

        // Compute gates: gates = x_t * W_ih^T + h_{t-1} * W_hh^T + b_ih + b_hh
        torch::Tensor gates = torch::addmm(b_ih, xt, w_ih.t());
        gates = torch::addmm(gates, h, w_hh.t());
        gates += b_hh;

        // Prepare device pointers
        const float* gates_ptr = gates.data_ptr<float>();
        const float* prev_c_ptr = c.data_ptr<float>();
        float* h_ptr = h.data_ptr<float>();
        float* c_ptr = c.data_ptr<float>();

        int total_elements = batch_size * hidden_size;
        int threads = 256;
        int blocks = (total_elements + threads - 1) / threads;

        // Launch CUDA kernel for LSTM cell computations
        lstm_elementwise_forward_modular<<<blocks, threads>>>(
            gates_ptr,
            prev_c_ptr,
            h_ptr,
            c_ptr,
            batch_size,
            hidden_size
        );

        // Collect output
        outputs.push_back(h.unsqueeze(1));
    }

    // Concatenate outputs
    torch::Tensor output = torch::cat(outputs, 1);

    return output;
}

// Function to compute linear forward pass using tiled reduction without atomic operations
torch::Tensor linear_forward_cuda(
    torch::Tensor input,
    torch::Tensor weight,
    torch::Tensor bias
) {
    int batch_size = input.size(0);
    int input_dim = input.size(1);
    int output_dim = weight.size(0);

    auto options = input.options();
    auto output = torch::empty({batch_size, output_dim}, options);

    // Launch one block per (batch, output) pair
    dim3 grid(batch_size, output_dim);
    int threads = 256;
    size_t shared_mem_size = threads * sizeof(float);

    linear_forward_kernel_tiled<<<grid, threads, shared_mem_size>>>(
        input.data_ptr<float>(),
        weight.data_ptr<float>(),
        bias.defined() ? bias.data_ptr<float>() : nullptr,
        output.data_ptr<float>(),
        input_dim
    );

    return output;
}

// Main forward function integrating LSTM and Linear layers
torch::Tensor forward(
    torch::Tensor x,
    std::vector<torch::Tensor> lstm_weights_ih,
    std::vector<torch::Tensor> lstm_weights_hh,
    std::vector<torch::Tensor> lstm_biases_ih,
    std::vector<torch::Tensor> lstm_biases_hh,
    torch::Tensor fc_weight,
    torch::Tensor fc_bias,
    torch::Tensor h0,
    torch::Tensor c0,
    bool is_training
) {
    // Ensure h0 and c0 are on the same device as x
    h0 = h0.to(x.device());
    c0 = c0.to(x.device());

    torch::Tensor out = x;
    int num_layers = lstm_weights_ih.size();

    for (int i = 0; i < num_layers; ++i) {
        auto w_ih = lstm_weights_ih[i].to(x.device());
        auto w_hh = lstm_weights_hh[i].to(x.device());
        auto b_ih = lstm_biases_ih[i].to(x.device());
        auto b_hh = lstm_biases_hh[i].to(x.device());

        // Prepare initial hidden and cell states for the current layer
        torch::Tensor h_i = h0.narrow(0, i, 1).squeeze(0);
        torch::Tensor c_i = c0.narrow(0, i, 1).squeeze(0);

        // Run LSTM layer
        out = lstm_forward_cuda(out, w_ih, w_hh, b_ih, b_hh, h_i, c_i);
    }

    // Take the last timestep
    out = out.select(1, -1);

    // Apply final linear layer using the tiled reduction kernel
    out = linear_forward_cuda(out, fc_weight, fc_bias);

    return out;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &forward, "Forward pass with fused LSTM and tiled linear kernel (CUDA)");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.346 inst/cycle 0.000 5
Executed Ipc Elapsed 0.120 inst/cycle 0.000 5
Issue Slots Busy 8.942 % 0.006 5
Issued Ipc Active 0.358 inst/cycle 0.000 5
SM Busy 8.942 % 0.006 5
Memory Throughput 6178738201.690 byte/second 7805074025018413.000 5
Mem Busy 8.428 % 0.006 5
Max Bandwidth 4.402 % 0.001 5
L1/TEX Hit Rate 0.000 % 0.000 5
L2 Hit Rate 99.006 % 0.014 5
Mem Pipes Busy 3.902 % 0.001 5
Warp Cycles Per Issued Instruction 18.682 cycle 0.039 5
Warp Cycles Per Executed Instruction 19.298 cycle 0.042 5
Avg. Active Threads Per Warp 31.460 0.000 5
Avg. Not Predicated Off Threads Per Warp 20.880 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 10.000 block 0.000 5
Block Limit Shared Mem 16.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 10.552 % 0.012 5
Achieved Active Warps Per SM 6.754 warp 0.005 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
WRN ThreadDivergence Instructions are executed in warps, which are groups of 32 threads. Optimal instruction throughput is achieved if all 32 threads of a warp execute the same instruction. The chosen launch configuration, early thread completion, and divergent flow control can significantly lower the number of active threads in a warp per cycle. This kernel achieves an average of 31.5 threads being active per cycle. This is further reduced to 20.9 threads per warp due to predication. The compiler may use predication to avoid an actual branch. Instead, all instructions are scheduled, but a per-thread condition code or predicate controls which threads execute the instructions. Try to avoid different execution paths within a warp when possible. In addition, ensure your kernel makes use of Independent Thread Scheduling, which allows a warp to reconverge after a data-dependent conditional block by explicitly calling __syncwarp().
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (10.7%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
Operation / Metric Value Unit
cudaMemcpyAsync
CPU Time 819144.20 μs
Device Time 0.00 μs
Self CPU Time 819144.20 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::t
CPU Time 883437.32 μs
Device Time 0.00 μs
Self CPU Time 400997.03 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::addmm
CPU Time 6441286.69 μs
Device Time 2623392.23 μs
Self CPU Time 4059256.44 μs
Self Device Time 2623392.23 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 2608783.39 μs
Device Time 90976.49 μs
Self CPU Time 2608783.39 μs
Self Device Time 90976.49 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void gemmSN_TN_kernel<float, 128, 16, 2, 4, 10, 11, false, cublasGemvTensorStridedBatched<float const>, cublasGemvTensorStridedBatched<float const>, cublasGemvTensorStridedBatched<float> >(cublasGemmSmallNParams<cublasGemvTensorStridedBatched<float const>, cublasGemvTensorStridedBatched<float const>, cublasGemvTensorStridedBatched<float>, float>)
CPU Time 0.00 μs
Device Time 1898447.09 μs
Self CPU Time 0.00 μs
Self Device Time 1898447.09 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::add_
CPU Time 1258633.21 μs
Device Time 675719.69 μs
Self CPU Time 567580.57 μs
Self Device Time 675719.69 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::elementwise_kernel<128, 2, at::native::gpu_kernel_impl_nocast<at::native::CUDAFunctor_add<float> >(at::TensorIteratorBase&, at::native::CUDAFunctor_add<float> const&)::{lambda(int)#1}>(int, at::native::gpu_kernel_impl_nocast<at::native::CUDAFunctor_add<float> >(at::TensorIteratorBase&, at::native::CUDAFunctor_add<float> const&)::{lambda(int)#1})
CPU Time 0.00 μs
Device Time 675719.69 μs
Self CPU Time 0.00 μs
Self Device Time 675719.69 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
lstm_elementwise_forward_modular(float const*, float const*, float*, float*, int, int)
CPU Time 0.00 μs
Device Time 564155.89 μs
Self CPU Time 0.00 μs
Self Device Time 564155.89 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed
45317 warnings generated when compiling for host.
Suppressed 45330 warnings (45283 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:16:43 bugprone-easily-swappable-parameters
16 | int gate_base,
| ^~~~~~~~~~~~~~
17 | float prev_c,
| ~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:16:47: note: the first parameter in the range is 'gate_base'
16 | int gate_base,
| ^~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:17:49: note: the last parameter in the range is 'prev_c'
17 | float prev_c,
| ^~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:17:43: note: 'int' and 'float' may be implicitly converted
17 | float prev_c,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:34:5: warning: 2 adjacent parameters of 'lstm_elementwise_forward_modular' of similar type ('float *__restrict') are easily swapped by mistake [bugprone-easily-swappable-parameters]
34 | float* __restrict__ h,
| ^~~~~~~~~~~~~~~~~~~~~~
35 | float* __restrict__ c,
| ~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:34:25: note: the first parameter in the range is 'h'
34 | float* __restrict__ h,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:35:25: note: the last parameter in the range is 'c'
35 | float* __restrict__ c,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:39:15: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
39 | int idx = blockIdx.x * blockDim.x + threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:56:5: warning: 2 adjacent parameters of 'linear_forward_kernel_tiled' of similar type ('const float *__restrict') are easily swapped by mistake [bugprone-easily-swappable-parameters]
56 | const float* __restrict__ weight,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
57 | const float* __restrict__ bias,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:56:31: note: the first parameter in the range is 'weight'
56 | const float* __restrict__ weight,
| ^~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:57:31: note: the last parameter in the range is 'bias'
57 | const float* __restrict__ bias,
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:61:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
61 | int batch_idx = blockIdx.x; // Each block row corresponds to a unique batch element
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:62:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
62 | int out_idx = blockIdx.y; // Each block column corresponds to a unique output neuron
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:63:15: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
63 | int tid = threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:67:43: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
67 | for (int k = tid; k < input_dim; k += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:77:18: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
77 | for (int s = blockDim.x / 2; s > 0; s >>= 1) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:97:5: warning: 2 adjacent parameters of 'lstm_forward_cuda' of similar type ('torch::Tensor') are easily swapped by mistake [bugprone-easily-swappable-parameters]
97 | torch::Tensor input,
| ^~~~~~~~~~~~~~~~~~~~
98 | torch::Tensor w_ih,
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:97:19: note: the first parameter in the range is 'input'
97 | torch::Tensor input,
| ^~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:98:19: note: the last parameter in the range is 'w_ih'
98 | torch::Tensor w_ih,
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:97:19: warning: the parameter 'input' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
97 | torch::Tensor input,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:98:19: warning: the parameter 'w_ih' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
98 | torch::Tensor w_ih,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:99:5: warning: 4 adjacent parameters of 'lstm_forward_cuda' of similar type ('torch::Tensor') are easily swapped by mistake [bugprone-easily-swappable-parameters]
99 | torch::Tensor w_hh,
| ^~~~~~~~~~~~~~~~~~~
100 | torch::Tensor b_ih,
| ~~~~~~~~~~~~~~~~~~~
101 | torch::Tensor b_hh,
| ~~~~~~~~~~~~~~~~~~~
102 | torch::Tensor h0,
| ~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:99:19: note: the first parameter in the range is 'w_hh'
99 | torch::Tensor w_hh,
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:102:19: note: the last parameter in the range is 'h0'
102 | torch::Tensor h0,
| ^~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:99:19: warning: the parameter 'w_hh' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
99 | torch::Tensor w_hh,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:100:19: warning: the parameter 'b_ih' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
100 | torch::Tensor b_ih,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:101:19: warning: the parameter 'b_hh' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
101 | torch::Tensor b_hh,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:102:19: warning: the parameter 'h0' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
102 | torch::Tensor h0,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:103:19: warning: the parameter 'c0' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
103 | torch::Tensor c0
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:105:10: warning: Value stored to 'options' during its initialization is never read [clang-analyzer-deadcode.DeadStores]
105 | auto options = torch::TensorOptions().dtype(input.dtype()).device(input.device());
| ^~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:105:10: note: Value stored to 'options' during its initialization is never read
105 | auto options = torch::TensorOptions().dtype(input.dtype()).device(input.device());
| ^~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:106:22: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
106 | int batch_size = input.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:107:19: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
107 | int seq_len = input.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:108:23: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
108 | int hidden_size = h0.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:156:19: warning: the parameter 'input' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
156 | torch::Tensor input,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:157:19: warning: the parameter 'weight' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
157 | torch::Tensor weight,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:158:19: warning: the parameter 'bias' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
158 | torch::Tensor bias
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:160:22: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
160 | int batch_size = input.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:161:21: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
161 | int input_dim = input.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:162:22: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
162 | int output_dim = weight.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:185:19: warning: the parameter 'x' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
185 | torch::Tensor x,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:186:5: warning: 4 adjacent parameters of 'forward' of similar type ('std::vector<torch::Tensor>') are easily swapped by mistake [bugprone-easily-swappable-parameters]
186 | std::vector<torch::Tensor> lstm_weights_ih,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
187 | std::vector<torch::Tensor> lstm_weights_hh,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
188 | std::vector<torch::Tensor> lstm_biases_ih,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
189 | std::vector<torch::Tensor> lstm_biases_hh,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:186:32: note: the first parameter in the range is 'lstm_weights_ih'
186 | std::vector<torch::Tensor> lstm_weights_ih,
| ^~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:189:32: note: the last parameter in the range is 'lstm_biases_hh'
189 | std::vector<torch::Tensor> lstm_biases_hh,
| ^~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:191:5: warning: 2 adjacent parameters of 'forward' of similar type ('torch::Tensor') are easily swapped by mistake [bugprone-easily-swappable-parameters]
191 | torch::Tensor fc_bias,
| ^~~~~~~~~~~~~~~~~~~~~~
192 | torch::Tensor h0,
| ~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:191:19: note: the first parameter in the range is 'fc_bias'
191 | torch::Tensor fc_bias,
| ^~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:192:19: note: the last parameter in the range is 'h0'
192 | torch::Tensor h0,
| ^~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:201:22: warning: narrowing conversion from 'size_type' (aka 'unsigned long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
201 | int num_layers = lstm_weights_ih.size();
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:221:36: warning: parameter 'fc_weight' is passed by value and only copied once; consider moving it to avoid unnecessary copies [performance-unnecessary-value-param]
2 | out = linear_forward_cuda(out, fc_weight, fc_bias);
| ^
| std::move( )
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_3/task_35/b4_s2_fused_tiled/base/base.cu:221:47: warning: parameter 'fc_bias' is passed by value and only copied once; consider moving it to avoid unnecessary copies [performance-unnecessary-value-param]
221 | out = linear_forward_cuda(out, fc_weight, fc_bias);
| ^
| std::move( )