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28_HardSigmoidvectorized_coalesced_hardsigmoid_base

Level 1 • Task 28
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(x: torch.Tensor) -> torch.Tensor:
    """
    Applies HardSigmoid activation to the input tensor.

    Args:
        x (torch.Tensor): Input tensor of any shape.

    Returns:
        torch.Tensor: Output tensor with HardSigmoid applied, same shape as input.
    """
    return F.hardsigmoid(x)


class Model(nn.Module):
    """
    Simple model that performs a HardSigmoid activation.
    """

    def __init__(self):
        super(Model, self).__init__()

    def forward(self, x: torch.Tensor, fn=module_fn) -> torch.Tensor:
        """
        Applies HardSigmoid activation to the input tensor.

        Args:
            x (torch.Tensor): Input tensor of any shape.

        Returns:
            torch.Tensor: Output tensor with HardSigmoid applied, same shape as input.
        """
        return fn(x)


batch_size = 16
dim = 16384


def get_inputs():
    x = torch.randn(batch_size, dim)
    return [x]


def get_init_inputs():
    return []  # No special initialization inputs needed
import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Simple model that performs a HardSigmoid activation.
    """
    def __init__(self):
        super(Model, self).__init__()
    
    def forward(self, x: torch.Tensor) -> torch.Tensor:
        """
        Applies HardSigmoid activation to the input tensor.

        Args:
            x (torch.Tensor): Input tensor of any shape.

        Returns:
            torch.Tensor: Output tensor with HardSigmoid applied, same shape as input.
        """
        return torch.nn.functional.hardsigmoid(x)

batch_size = 16
dim = 16384

def get_inputs():
    x = torch.randn(batch_size, dim)
    return [x]

def get_init_inputs():
    return []  # No special initialization inputs needed

Kernel Information

Related Kernels (Level 1, Task 28 • 28_HardSigmoid)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 hardsigmoid_warp_vectorized_base 0.01 1.12 4.96
🥇 hardsigmoid_shared_optimized_edit_1 0.01 1.12 4.96
🥇 hardsigmoid_unrolled_optimized_edit_1 0.01 1.12 4.96
🥇 hardsigmoid_unrolled_optimized_base 0.01 1.12 4.96
🥇 evenly_distributed_hardsigmoid_base 0.01 1.12 4.96
6 divergence_reduced_hardsigmoid_base_base 0.01 0.96 4.25
6 constant_mem_hardsigmoid_base 0.01 0.96 4.25
6 warp_hardsigmoid_opt_base 0.01 0.96 4.25
6 28_HardSigmoid 0.01 0.96 4.25
6 modular_hardsigmoid_base 0.01 0.96 4.25
6 modular_hardsigmoid_base 0.01 0.96 4.25
6 branchless_hardsigmoid_base 0.01 0.96 4.25
6 warp_optimized_hardsigmoid_base 0.01 0.96 4.25
6 optimized_hardsigmoid_base 0.01 0.96 4.25
6 warp_broadcast_hardsigmoid_base 0.01 0.96 4.25
6 vectorized_coalesced_hardsigmoid_base 0.01 0.96 4.25
6 vectorized_coalesced_hardsigmoid_base 0.01 0.96 4.25
6 shared_memory_hardsigmoid_base_base 0.01 0.96 4.25
6 warp_optimized_hardsigmoid_base 0.01 0.96 4.25
6 even_chunk_hardsigmoid_base 0.01 0.96 4.25
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <type_traits>

// Device function to compute HardSigmoid: y = clamp((x + 3) / 6, 0, 1)
template <typename scalar_t>
__device__ inline scalar_t hardsigmoid_func(scalar_t x) {
    scalar_t y = (x + static_cast<scalar_t>(3)) / static_cast<scalar_t>(6);
    return (y < static_cast<scalar_t>(0)) ? static_cast<scalar_t>(0) : 
           (y > static_cast<scalar_t>(1)) ? static_cast<scalar_t>(1) : y;
}

// Vectorized kernel using pack types to ensure memory coalescing
// For float, we use float4 (pack_size = 4); for double, we use double2 (pack_size = 2).

template <typename scalar_t, typename pack_t, int pack_size>
__global__ void vectorized_hardsigmoid_kernel(const scalar_t* __restrict__ input,
                                              scalar_t* __restrict__ output,
                                              size_t numel) {
    // Number of complete packs
    size_t num_pack = numel / pack_size;
    size_t idx = blockIdx.x * blockDim.x + threadIdx.x;
    size_t stride = blockDim.x * gridDim.x;

    // Reinterpret memory as vectorized packs
    const pack_t* input_pack = reinterpret_cast<const pack_t*>(input);
    pack_t* output_pack = reinterpret_cast<pack_t*>(output);

    // Process vectorized elements
    for (size_t i = idx; i < num_pack; i += stride) {
        pack_t in_pack = input_pack[i];
        pack_t out_pack;
        // Process each element in the pack
        scalar_t* in_vals = reinterpret_cast<scalar_t*>(&in_pack);
        scalar_t* out_vals = reinterpret_cast<scalar_t*>(&out_pack);
        #pragma unroll
        for (int j = 0; j < pack_size; j++) {
            out_vals[j] = hardsigmoid_func<scalar_t>(in_vals[j]);
        }
        output_pack[i] = out_pack;
    }

    // Handle leftover elements that don't fit in a complete pack
    size_t remainder_start = num_pack * pack_size;
    for (size_t i = remainder_start + idx; i < numel; i += stride) {
        scalar_t x = input[i];
        output[i] = hardsigmoid_func<scalar_t>(x);
    }
}

// Forward function dispatching the appropriate kernel

torch::Tensor forward(torch::Tensor input) {
    TORCH_CHECK(input.is_cuda(), "Input tensor must be on CUDA");
    auto output = torch::empty_like(input);
    size_t numel = input.numel();

    int threads = 1024;
    int blocks = 0;

    AT_DISPATCH_FLOATING_TYPES(input.scalar_type(), "vectorized_coalesced_hardsigmoid_cuda", ([&] {
        if (std::is_same<scalar_t, float>::value) {
            constexpr int pack_size = 4;
            using pack_t = float4;
            // Adjust blocks for the vectorized loop
            blocks = ((numel / pack_size) + threads - 1) / threads;
            vectorized_hardsigmoid_kernel<scalar_t, pack_t, pack_size><<<blocks, threads>>>(
                input.data_ptr<scalar_t>(),
                output.data_ptr<scalar_t>(),
                numel);
        } else if (std::is_same<scalar_t, double>::value) {
            constexpr int pack_size = 2;
            using pack_t = double2;
            blocks = ((numel / pack_size) + threads - 1) / threads;
            vectorized_hardsigmoid_kernel<scalar_t, pack_t, pack_size><<<blocks, threads>>>(
                input.data_ptr<scalar_t>(),
                output.data_ptr<scalar_t>(),
                numel);
        }
    }));

    cudaError_t err = cudaGetLastError();
    TORCH_CHECK(err == cudaSuccess, "CUDA kernel failed: ", cudaGetErrorString(err));
    return output;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
  m.def("forward", &forward, "Vectorized, coalesced HardSigmoid activation forward (CUDA)");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.872 inst/cycle 0.002 5
Executed Ipc Elapsed 0.174 inst/cycle 0.000 5
Issue Slots Busy 24.384 % 1.337 5
Issued Ipc Active 0.976 inst/cycle 0.002 5
SM Busy 24.384 % 1.337 5
Memory Throughput 281358297070.950 byte/second 87093134701075513344.000 5
Mem Busy 13.396 % 0.214 5
Max Bandwidth 12.314 % 0.173 5
L1/TEX Hit Rate 0.000 % 0.000 5
L2 Hit Rate 67.046 % 0.023 5
Mem Pipes Busy 1.586 % 0.003 5
Warp Cycles Per Issued Instruction 27.836 cycle 1.446 5
Warp Cycles Per Executed Instruction 31.104 cycle 1.807 5
Avg. Active Threads Per Warp 32.000 0.000 5
Avg. Not Predicated Off Threads Per Warp 31.030 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 4.000 block 0.000 5
Block Limit Shared Mem 8.000 block 0.000 5
Block Limit Warps 2.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 43.114 % 0.173 5
Achieved Active Warps Per SM 27.592 warp 0.071 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (42.8%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 377524.25 μs
Device Time 40.13 μs
Self CPU Time 36.07 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 377488.17 μs
Device Time 40.13 μs
Self CPU Time 87.91 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 391700.31 μs
Device Time 0.00 μs
Self CPU Time 14665.57 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 376850.62 μs
Device Time 0.00 μs
Self CPU Time 376850.62 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 353781.99 μs
Device Time 549.88 μs
Self CPU Time 353781.99 μs
Self Device Time 549.88 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void vectorized_hardsigmoid_kernel<float, float4, 4>(float const*, float*, unsigned long)
CPU Time 0.00 μs
Device Time 17888.21 μs
Self CPU Time 0.00 μs
Self Device Time 17888.21 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaEventRecord
CPU Time 16163.45 μs
Device Time 30204.45 μs
Self CPU Time 16163.45 μs
Self Device Time 30204.45 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 53383.74 μs
Device Time 466214.72 μs
Self CPU Time 9437.94 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 43947.59 μs
Device Time 466214.72 μs
Self CPU Time 13382.71 μs
Self Device Time 466214.72 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 466214.72 μs
Self CPU Time 0.00 μs
Self Device Time 466214.72 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed
45279 warnings generated when compiling for host.
Suppressed 45321 warnings (45274 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_28/b5_s2_vectorized_coalesced_hardsigmoid/base/base.cu:24:21 bugprone-implicit-widening-of-multiplication-result
24 | size_t stride = blockDim.x * gridDim.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_28/b5_s2_vectorized_coalesced_hardsigmoid/base/base.cu:24:21: note: make conversion explicit to silence this warning
4 | size_t stride = blockDim.x * gridDim.x;
| ^~~~~~~~~~~~~~~~~~~~~~
| static_cast<size_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_28/b5_s2_vectorized_coalesced_hardsigmoid/base/base.cu:24:21: note: perform multiplication in a wider type
24 | size_t stride = blockDim.x * gridDim.x;
| ^~~~~~~~~~
| static_cast<size_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_28/b5_s2_vectorized_coalesced_hardsigmoid/base/base.cu:39:27: warning: 1st function call argument is an uninitialized value [clang-analyzer-core.CallAndMessage]
39 | out_vals[j] = hardsigmoid_func<scalar_t>(in_vals[j]);
| ^ ~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_28/b5_s2_vectorized_coalesced_hardsigmoid/base/base.cu:31:26: note: Assuming 'i' is < 'num_pack'
31 | for (size_t i = idx; i < num_pack; i += stride) {
| ^~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_28/b5_s2_vectorized_coalesced_hardsigmoid/base/base.cu:31:5: note: Loop condition is true. Entering loop body
31 | for (size_t i = idx; i < num_pack; i += stride) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_28/b5_s2_vectorized_coalesced_hardsigmoid/base/base.cu:38:9: note: Loop condition is true. Entering loop body
38 | for (int j = 0; j < pack_size; j++) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_28/b5_s2_vectorized_coalesced_hardsigmoid/base/base.cu:38:40: note: The value 1 is assigned to 'j'
38 | for (int j = 0; j < pack_size; j++) {
| ^~~
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_28/b5_s2_vectorized_coalesced_hardsigmoid/base/base.cu:38:9: note: Loop condition is true. Entering loop body
38 | for (int j = 0; j < pack_size; j++) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_28/b5_s2_vectorized_coalesced_hardsigmoid/base/base.cu:39:27: note: 1st function call argument is an uninitialized value
39 | out_vals[j] = hardsigmoid_func<scalar_t>(in_vals[j]);
| ^ ~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_28/b5_s2_vectorized_coalesced_hardsigmoid/base/base.cu:62:5: warning: inside a lambda, '__func__' expands to the name of the function call operator; consider capturing the name of the enclosing function explicitly [bugprone-lambda-function-name]
62 | AT_DISPATCH_FLOATING_TYPES(input.scalar_type(), "vectorized_coalesced_hardsigmoid_cuda", ([&] {
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:237:34: note: expanded from macro 'AT_DISPATCH_FLOATING_TYPES'
237 | AT_DISPATCH_SWITCH(TYPE, NAME, AT_DISPATCH_CASE_FLOATING_TYPES(__VA_ARGS__))
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:233:3: note: expanded from macro 'AT_DISPATCH_CASE_FLOATING_TYPES'
233 | AT_DISPATCH_CASE(at::ScalarType::Double, __VA_ARGS__) \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:74:3: note: expanded from macro 'AT_DISPATCH_CASE'
74 | AT_PRIVATE_CASE_TYPE_USING_HINT(enum_type, scalar_t, __VA_ARGS__)
| ^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:58:7: note: expanded from macro 'AT_PRIVATE_CHECK_SELECTIVE_BUILD'
58 | AT_ERROR( \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:711:32: note: expanded from macro 'AT_ERROR'
711 | C10_EXPAND_MSVC_WORKAROUND(TORCH_CHECK(false, ::c10::str(__VA_ARGS__))); \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:536:9: note: expanded from macro 'TORCH_CHECK'
536 | __func__, \
| ^