47_Sum_reduction_over_a_dimension • warp_level_primitives_sum_reduction_baseimport torch
import torch.nn as nn
import torch.nn.functional as F
def module_fn(x: torch.Tensor, dim: int) -> torch.Tensor:
"""
Applies sum reduction over the specified dimension.
Args:
x (torch.Tensor): Input tensor of shape (..., dim, ...).
dim (int): Dimension to reduce over.
Returns:
torch.Tensor: Output tensor after sum reduction, shape (..., 1, ...).
"""
return torch.sum(x, dim=dim, keepdim=True)
class Model(nn.Module):
"""
Simple model that performs sum reduction over a specified dimension.
"""
def __init__(self, dim: int):
"""
Initializes the model with the dimension to reduce over.
Args:
dim (int): Dimension to reduce over.
"""
super(Model, self).__init__()
self.dim = dim
def forward(self, x: torch.Tensor, fn=module_fn) -> torch.Tensor:
"""
Applies sum reduction over the specified dimension.
Args:
x (torch.Tensor): Input tensor of shape (..., dim, ...).
Returns:
torch.Tensor: Output tensor after sum reduction, shape (..., 1, ...).
"""
return fn(x, self.dim)
batch_size = 16
dim1 = 256
dim2 = 256
reduce_dim = 1
def get_inputs():
x = torch.randn(batch_size, dim1, dim2)
return [x]
def get_init_inputs():
return [reduce_dim]
import torch
import torch.nn as nn
class Model(nn.Module):
"""
Simple model that performs sum reduction over a specified dimension.
"""
def __init__(self, dim: int):
"""
Initializes the model with the dimension to reduce over.
Args:
dim (int): Dimension to reduce over.
"""
super(Model, self).__init__()
self.dim = dim
def forward(self, x: torch.Tensor) -> torch.Tensor:
"""
Applies sum reduction over the specified dimension.
Args:
x (torch.Tensor): Input tensor of shape (..., dim, ...).
Returns:
torch.Tensor: Output tensor after sum reduction, shape (..., 1, ...).
"""
return torch.sum(x, dim=self.dim, keepdim=True)
batch_size = 16
dim1 = 256
dim2 = 256
reduce_dim = 1
def get_inputs():
x = torch.randn(batch_size, dim1, dim2)
return [x]
def get_init_inputs():
return [reduce_dim]#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
// Kernel that uses warp-level primitives (__shfl_down_sync) for reduction across the reduce dimension.
// Each warp computes one output element by partitioning the reduction workload among its threads.
template <typename scalar_t>
__global__ void warp_reduce_sum_kernel(
const scalar_t* __restrict__ input,
scalar_t* __restrict__ output,
int64_t reduce_size,
int64_t inner_size,
int64_t total_outputs) {
// Calculate global warp id and lane id
const int warpSize = 32;
int global_thread_id = blockIdx.x * blockDim.x + threadIdx.x;
int warp_id = global_thread_id / warpSize;
int lane = global_thread_id % warpSize;
// Total warps available
int total_warps = (gridDim.x * blockDim.x) / warpSize;
// Each warp processes one output element in a grid-stride loop over warps
for (int out_idx = warp_id; out_idx < total_outputs; out_idx += total_warps) {
// Map the output index to the corresponding outer and inner indices
int outer_idx = out_idx / inner_size;
int inner_idx = out_idx % inner_size;
// Compute the base address for the reduction
int64_t base = outer_idx * reduce_size * inner_size + inner_idx;
scalar_t sum_val = 0;
// Each thread in the warp accumulates a partial sum over the reduction dimension, striding by warpSize
for (int i = lane; i < reduce_size; i += warpSize) {
sum_val += input[base + i * inner_size];
}
// Perform warp-level reduction using shuffle down
for (int offset = warpSize / 2; offset > 0; offset /= 2) {
sum_val += __shfl_down_sync(0xFFFFFFFF, sum_val, offset);
}
// Lane 0 writes the final result for this output element
if (lane == 0) {
output[out_idx] = sum_val;
}
}
}
// CUDA wrapper function
torch::Tensor sum_reduce_cuda(torch::Tensor input, int64_t dim) {
// Adjust for negative dimensions
if (dim < 0) dim += input.dim();
auto sizes = input.sizes().vec();
int64_t reduce_size = sizes[dim];
// Compute outer and inner dimensions
int64_t outer_size = 1;
for (int i = 0; i < dim; i++) {
outer_size *= sizes[i];
}
int64_t inner_size = 1;
for (int i = dim + 1; i < sizes.size(); i++) {
inner_size *= sizes[i];
}
// Output tensor: replacing reduction dimension with 1
sizes[dim] = 1;
auto output = torch::empty(sizes, input.options());
// Total number of output elements is outer_size x inner_size
int64_t total_outputs = outer_size * inner_size;
// Configure kernel launch parameters using warp-level reduction
// Each output element is computed by one warp (32 threads)
const int warpSize = 32;
int required_warps = total_outputs; // one warp per output element
int total_threads = required_warps * warpSize;
int threads = 256; // Choose block size as a multiple of 32 (e.g., 256 threads per block)
int blocks = (total_threads + threads - 1) / threads;
AT_DISPATCH_FLOATING_TYPES(input.scalar_type(), "sum_reduce_cuda", ([&] {
warp_reduce_sum_kernel<scalar_t><<<blocks, threads>>>(
input.data_ptr<scalar_t>(),
output.data_ptr<scalar_t>(),
reduce_size,
inner_size,
total_outputs
);
}));
return output;
}
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
m.def("forward", &sum_reduce_cuda, "Sum reduction forward (CUDA)");
}
| Metric | Value | Unit | Variance | Samples |
|---|---|---|---|---|
| Executed Ipc Active | 0.624 | inst/cycle | 0.000 | 5 |
| Executed Ipc Elapsed | 0.456 | inst/cycle | 0.000 | 5 |
| Issue Slots Busy | 15.936 | % | 0.022 | 5 |
| Issued Ipc Active | 0.638 | inst/cycle | 0.000 | 5 |
| SM Busy | 15.936 | % | 0.022 | 5 |
| Memory Throughput | 436308638329.892 | byte/second | 9442660766087698432.000 | 5 |
| Mem Busy | 53.590 | % | 0.164 | 5 |
| Max Bandwidth | 13.062 | % | 0.009 | 5 |
| L1/TEX Hit Rate | 87.482 | % | 0.000 | 5 |
| L2 Hit Rate | 47.534 | % | 0.007 | 5 |
| Mem Pipes Busy | 3.758 | % | 0.001 | 5 |
| Warp Cycles Per Issued Instruction | 41.174 | cycle | 0.141 | 5 |
| Warp Cycles Per Executed Instruction | 42.092 | cycle | 0.147 | 5 |
| Avg. Active Threads Per Warp | 32.000 | 0.000 | 5 | |
| Avg. Not Predicated Off Threads Per Warp | 30.160 | 0.000 | 5 | |
| Max Active Clusters | 0.000 | cluster | 0.000 | 5 |
| Max Cluster Size | 8.000 | block | 0.000 | 5 |
| Overall GPU Occupancy | 0.000 | % | 0.000 | 5 |
| Cluster Occupancy | 0.000 | % | 0.000 | 5 |
| Block Limit SM | 32.000 | block | 0.000 | 5 |
| Block Limit Registers | 6.000 | block | 0.000 | 5 |
| Block Limit Shared Mem | 32.000 | block | 0.000 | 5 |
| Block Limit Warps | 8.000 | block | 0.000 | 5 |
| Theoretical Active Warps per SM | 48.000 | warp | 0.000 | 5 |
| Theoretical Occupancy | 75.000 | % | 0.000 | 5 |
| Achieved Occupancy | 41.380 | % | 0.007 | 5 |
| Achieved Active Warps Per SM | 26.484 | warp | 0.003 | 5 |
| Rule | Description |
|---|---|
| WRN HighPipeUtilization | All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details. |
| INF CPIStall | Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason. |
| WRN Occupancy | This kernel's theoretical occupancy (75.0%) is limited by the number of required registers. The difference between calculated theoretical (75.0%) and measured achieved occupancy (41.4%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy. |
| Operation / Metric | Value | Unit |
|---|---|---|
| aten::to | ||
| CPU Time | 470468.65 | μs |
| Device Time | 376.19 | μs |
| Self CPU Time | 41.60 | μs |
| Self Device Time | 0.00 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| aten::_to_copy | ||
| CPU Time | 470427.05 | μs |
| Device Time | 376.19 | μs |
| Self CPU Time | 102.33 | μs |
| Self Device Time | 0.00 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| aten::empty_strided | ||
| CPU Time | 469679.53 | μs |
| Device Time | 0.00 | μs |
| Self CPU Time | 90.65 | μs |
| Self Device Time | 0.00 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| cudaDeviceGetStreamPriorityRange | ||
| CPU Time | 450896.39 | μs |
| Device Time | 0.00 | μs |
| Self CPU Time | 450896.39 | μs |
| Self Device Time | 0.00 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| cudaLaunchKernel | ||
| CPU Time | 556398.47 | μs |
| Device Time | 21823.24 | μs |
| Self CPU Time | 556398.47 | μs |
| Self Device Time | 21823.24 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| void warp_reduce_sum_kernel<float>(float const*, float*, long, long, long) | ||
| CPU Time | 0.00 | μs |
| Device Time | 74166.27 | μs |
| Self CPU Time | 0.00 | μs |
| Self Device Time | 74166.27 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| cudaEventRecord | ||
| CPU Time | 18589.53 | μs |
| Device Time | 43256.94 | μs |
| Self CPU Time | 18589.53 | μs |
| Self Device Time | 43256.94 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| aten::zero_ | ||
| CPU Time | 67915.94 | μs |
| Device Time | 647232.34 | μs |
| Self CPU Time | 15040.95 | μs |
| Self Device Time | 0.00 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| aten::fill_ | ||
| CPU Time | 52876.40 | μs |
| Device Time | 647232.34 | μs |
| Self CPU Time | 16238.53 | μs |
| Self Device Time | 647232.34 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>) | ||
| CPU Time | 0.00 | μs |
| Device Time | 647310.83 | μs |
| Self CPU Time | 0.00 | μs |
| Self Device Time | 647310.83 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
45285 warnings generated when compiling for host. Suppressed 45322 warnings (45275 in non-user code, 47 NOLINT). Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.