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53_Min_reduction_over_a_dimensionmin_reduce_dynamic_block_base_base

Level 1 • Task 53
import torch
import torch.nn as nn
import torch.functional as F


def module_fn(x: torch.Tensor, dim: int) -> torch.Tensor:
    """
    Applies min reduction over the specified dimension to the input tensor.

    Args:
        x (torch.Tensor): Input tensor
        dim (int): The dimension to reduce over

    Returns:
        torch.Tensor: Output tensor after min reduction over the specified dimension
    """
    return torch.min(x, dim)[0]


class Model(nn.Module):
    """
    Simple model that performs min reduction over a specific dimension.
    """

    def __init__(self, dim: int):
        """
        Initializes the model with the dimension to reduce over.

        Args:
            dim (int): The dimension to reduce over.
        """
        super(Model, self).__init__()
        self.dim = dim

    def forward(self, x: torch.Tensor, fn=module_fn) -> torch.Tensor:
        """
        Applies min reduction over the specified dimension to the input tensor.

        Args:
            x (torch.Tensor): Input tensor
            fn: Function to apply (defaults to module_fn)

        Returns:
            torch.Tensor: Output tensor after min reduction over the specified dimension
        """
        return fn(x, self.dim)


batch_size = 16
dim1 = 256
dim2 = 256


def get_inputs():
    x = torch.randn(batch_size, dim1, dim2)
    return [x]


def get_init_inputs():
    return [1]  # Example, change to desired dimension
import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Simple model that performs min reduction over a specific dimension.
    """
    def __init__(self, dim: int):
        """
        Initializes the model with the dimension to reduce over.

        Args:
            dim (int): The dimension to reduce over.
        """
        super(Model, self).__init__()
        self.dim = dim

    def forward(self, x: torch.Tensor) -> torch.Tensor:
        """
        Applies min reduction over the specified dimension to the input tensor.

        Args:
            x (torch.Tensor): Input tensor.

        Returns:
            torch.Tensor: Output tensor after min reduction over the specified dimension.
        """
        return torch.min(x, dim=self.dim)[0]

batch_size = 16
dim1 = 256
dim2 = 256

def get_inputs():
    x = torch.randn(batch_size, dim1, dim2)
    return [x]

def get_init_inputs():
    return [1] # Example, change to desired dimension

Kernel Information

Related Kernels (Level 1, Task 53 • 53_Min_reduction_over_a_dimension)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 min_reduction_warp_base_base 0.01 2.19 3.09
🥇 efficient_min_reduce_kernel_base 0.01 2.19 3.09
🥇 min_reduce_block_size_tuning_base 0.01 2.19 3.09
🥇 min_reduce_optimized_base 0.01 2.19 3.09
🥇 min_reduction_optimized_memory_base 0.01 2.19 3.09
🥇 min_reduce_tunable_blocksize_base 0.01 2.19 3.09
🥇 min_reduce_dynamic_block_base_base 0.01 2.19 3.09
🥇 modular_min_reduce_kernel_base_base 0.01 2.19 3.09
🥇 min_reduce_adaptive_blocks_base_base 0.01 2.19 3.09
🥇 min_reduce_fused_warp_base 0.01 2.19 3.09
🥇 min_reduce_combined_base 0.01 2.19 3.09
🥇 min_reduce_warp_unroll_base 0.01 2.19 3.09
🥇 min_reduce_combined_kernel_base 0.01 2.19 3.09
14 balanced_min_reduction_base 0.01 1.85 2.62
15 min_reduction_warp_shared_hybrid_base 0.01 1.72 2.43
15 optimized_block_size_experiment_base_base 0.01 1.72 2.43
15 min_reduction_shared_base 0.01 1.72 2.43
15 modular_min_reduction_base 0.01 1.72 2.43
15 fast_min_reduction_edit_1 0.01 1.72 2.43
15 vector_load_min_reduction_edit_1 0.01 1.72 2.43
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <vector>
#include <limits>
#include <c10/cuda/CUDAStream.h>

// Optimized CUDA kernel using dynamic block sizes for efficient min reduction
// along a specified dimension using warp-level reductions.
template <typename scalar_t>
__global__ void min_reduce_dynamic_block_kernel(
    const scalar_t* __restrict__ input,
    scalar_t* __restrict__ output,
    const int outer,
    const int r,
    const int inner) {

  const int warpSize = 32;
  int idx = blockIdx.x * blockDim.x + threadIdx.x;
  int warp_id = idx / warpSize;
  if (warp_id >= outer * inner) return;

  int lane = threadIdx.x % warpSize;
  int outer_idx = warp_id / inner;
  int inner_idx = warp_id % inner;

  int base = outer_idx * (r * inner) + inner_idx;

  // Initialize local_min to the maximum possible value
  scalar_t local_min = std::numeric_limits<scalar_t>::max();

  // Each thread in a warp processes different elements across 'r' dimension
  #pragma unroll
  for (int j = lane; j < r; j += warpSize) {
    scalar_t val = input[base + j * inner];
    local_min = (val < local_min) ? val : local_min;
  }

  // Reduce within the warp
  for (int offset = warpSize / 2; offset > 0; offset /= 2) {
    scalar_t other = __shfl_down_sync(0xffffffff, local_min, offset);
    local_min = (other < local_min) ? other : local_min;
  }

  // First lane of each warp writes the result
  if (lane == 0) {
    output[warp_id] = local_min;
  }
}

// Forward function that translates shapes, dimensions and launches the kernel
torch::Tensor forward(torch::Tensor input, int64_t dim) {
  TORCH_CHECK(input.is_cuda(), "input must be a CUDA tensor");
  if (!input.is_contiguous()) {
    input = input.contiguous();
  }

  int ndim = input.dim();
  TORCH_CHECK(dim >= 0 && dim < ndim, "dim out of range");

  int outer = 1;
  for (int i = 0; i < dim; i++) {
    outer *= input.size(i);
  }
  int r = input.size(dim);
  int inner = 1;
  for (int i = dim + 1; i < ndim; i++) {
    inner *= input.size(i);
  }

  std::vector<int64_t> output_shape;
  for (int i = 0; i < ndim; i++) {
    if (i != dim) {
      output_shape.push_back(input.size(i));
    }
  }
  auto output = torch::empty(output_shape, input.options());

  int total_warps = outer * inner;
  const int block_sizes[] = {32, 64, 128, 256, 512};
  const int threads_per_block = block_sizes[(total_warps * 32 / 512) % 5];
  int num_blocks = (total_warps * 32 + threads_per_block - 1) / threads_per_block;

  AT_DISPATCH_ALL_TYPES(input.scalar_type(), "min_reduce_dynamic_block_cuda", ([&] {
    min_reduce_dynamic_block_kernel<scalar_t><<<num_blocks, threads_per_block, 0,
      c10::cuda::getCurrentCUDAStream().stream()>>>(
        input.data_ptr<scalar_t>(),
        output.data_ptr<scalar_t>(),
        outer,
        r,
        inner);
  }));

  return output;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
  m.def("forward", &forward, "Optimized min reduction using dynamic block sizes and warp-level primitives (CUDA)");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.360 inst/cycle 0.000 5
Executed Ipc Elapsed 0.266 inst/cycle 0.000 5
Issue Slots Busy 9.356 % 0.003 5
Issued Ipc Active 0.374 inst/cycle 0.000 5
SM Busy 9.356 % 0.003 5
Memory Throughput 461133518415.172 byte/second 51234458738480144384.000 5
Mem Busy 56.890 % 0.823 5
Max Bandwidth 20.234 % 0.437 5
L1/TEX Hit Rate 48.108 % 0.058 5
L2 Hit Rate 75.122 % 0.564 5
Mem Pipes Busy 3.244 % 0.002 5
Warp Cycles Per Issued Instruction 68.932 cycle 0.172 5
Warp Cycles Per Executed Instruction 71.424 cycle 0.189 5
Avg. Active Threads Per Warp 30.480 0.000 5
Avg. Not Predicated Off Threads Per Warp 28.110 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 42.000 block 0.000 5
Block Limit Shared Mem 32.000 block 0.000 5
Block Limit Warps 32.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 40.412 % 0.007 5
Achieved Active Warps Per SM 25.864 warp 0.003 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (40.3%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 371638.76 μs
Device Time 352.96 μs
Self CPU Time 34.96 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 371603.80 μs
Device Time 352.96 μs
Self CPU Time 90.98 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 370908.97 μs
Device Time 0.00 μs
Self CPU Time 72.46 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 370627.52 μs
Device Time 0.00 μs
Self CPU Time 370627.52 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 508392.17 μs
Device Time 705.41 μs
Self CPU Time 508392.17 μs
Self Device Time 705.41 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void min_reduce_dynamic_block_kernel<float>(float const*, float*, int, int, int)
CPU Time 0.00 μs
Device Time 61073.41 μs
Self CPU Time 0.00 μs
Self Device Time 61073.41 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 66504.23 μs
Device Time 621372.15 μs
Self CPU Time 14228.54 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 52279.94 μs
Device Time 621372.15 μs
Self CPU Time 16549.45 μs
Self Device Time 621372.15 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 621372.15 μs
Self CPU Time 0.00 μs
Self Device Time 621372.15 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed
45296 warnings generated when compiling for host.
Suppressed 45327 warnings (45280 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_53/b10_s3_min_reduce_dynamic_block_base/base/base.cu:14:5 bugprone-easily-swappable-parameters
14 | const int outer,
| ^~~~~~~~~~~~~~~~
15 | const int r,
| ~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_53/b10_s3_min_reduce_dynamic_block_base/base/base.cu:14:15: note: the first parameter in the range is 'outer'
14 | const int outer,
| ^~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_53/b10_s3_min_reduce_dynamic_block_base/base/base.cu:15:15: note: the last parameter in the range is 'r'
15 | const int r,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_53/b10_s3_min_reduce_dynamic_block_base/base/base.cu:19:13: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
19 | int idx = blockIdx.x * blockDim.x + threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_53/b10_s3_min_reduce_dynamic_block_base/base/base.cu:23:14: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
23 | int lane = threadIdx.x % warpSize;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_53/b10_s3_min_reduce_dynamic_block_base/base/base.cu:58:14: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
58 | int ndim = input.dim();
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_53/b10_s3_min_reduce_dynamic_block_base/base/base.cu:63:14: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
63 | outer *= input.size(i);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_53/b10_s3_min_reduce_dynamic_block_base/base/base.cu:65:11: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
65 | int r = input.size(dim);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_53/b10_s3_min_reduce_dynamic_block_base/base/base.cu:67:16: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
67 | for (int i = dim + 1; i < ndim; i++) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_53/b10_s3_min_reduce_dynamic_block_base/base/base.cu:68:14: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
68 | inner *= input.size(i);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_53/b10_s3_min_reduce_dynamic_block_base/base/base.cu:84:3: warning: inside a lambda, '__func__' expands to the name of the function call operator; consider capturing the name of the enclosing function explicitly [bugprone-lambda-function-name]
84 | AT_DISPATCH_ALL_TYPES(input.scalar_type(), "min_reduce_dynamic_block_cuda", ([&] {
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:482:34: note: expanded from macro 'AT_DISPATCH_ALL_TYPES'
482 | AT_DISPATCH_SWITCH(TYPE, NAME, AT_DISPATCH_CASE_ALL_TYPES(__VA_ARGS__))
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:478:3: note: expanded from macro 'AT_DISPATCH_CASE_ALL_TYPES'
478 | AT_DISPATCH_CASE_INTEGRAL_TYPES(__VA_ARGS__) \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:458:3: note: expanded from macro 'AT_DISPATCH_CASE_INTEGRAL_TYPES'
458 | AT_DISPATCH_CASE(at::ScalarType::Byte, __VA_ARGS__) \
| ^
note: (skipping 2 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:58:7: note: expanded from macro 'AT_PRIVATE_CHECK_SELECTIVE_BUILD'
58 | AT_ERROR( \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:711:32: note: expanded from macro 'AT_ERROR'
711 | C10_EXPAND_MSVC_WORKAROUND(TORCH_CHECK(false, ::c10::str(__VA_ARGS__))); \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:536:9: note: expanded from macro 'TORCH_CHECK'
536 | __func__, \
| ^