53_Min_reduction_over_a_dimension • min_reduce_combined_baseimport torch
import torch.nn as nn
import torch.functional as F
def module_fn(x: torch.Tensor, dim: int) -> torch.Tensor:
"""
Applies min reduction over the specified dimension to the input tensor.
Args:
x (torch.Tensor): Input tensor
dim (int): The dimension to reduce over
Returns:
torch.Tensor: Output tensor after min reduction over the specified dimension
"""
return torch.min(x, dim)[0]
class Model(nn.Module):
"""
Simple model that performs min reduction over a specific dimension.
"""
def __init__(self, dim: int):
"""
Initializes the model with the dimension to reduce over.
Args:
dim (int): The dimension to reduce over.
"""
super(Model, self).__init__()
self.dim = dim
def forward(self, x: torch.Tensor, fn=module_fn) -> torch.Tensor:
"""
Applies min reduction over the specified dimension to the input tensor.
Args:
x (torch.Tensor): Input tensor
fn: Function to apply (defaults to module_fn)
Returns:
torch.Tensor: Output tensor after min reduction over the specified dimension
"""
return fn(x, self.dim)
batch_size = 16
dim1 = 256
dim2 = 256
def get_inputs():
x = torch.randn(batch_size, dim1, dim2)
return [x]
def get_init_inputs():
return [1] # Example, change to desired dimension
import torch
import torch.nn as nn
class Model(nn.Module):
"""
Simple model that performs min reduction over a specific dimension.
"""
def __init__(self, dim: int):
"""
Initializes the model with the dimension to reduce over.
Args:
dim (int): The dimension to reduce over.
"""
super(Model, self).__init__()
self.dim = dim
def forward(self, x: torch.Tensor) -> torch.Tensor:
"""
Applies min reduction over the specified dimension to the input tensor.
Args:
x (torch.Tensor): Input tensor.
Returns:
torch.Tensor: Output tensor after min reduction over the specified dimension.
"""
return torch.min(x, dim=self.dim)[0]
batch_size = 16
dim1 = 256
dim2 = 256
def get_inputs():
x = torch.randn(batch_size, dim1, dim2)
return [x]
def get_init_inputs():
return [1] # Example, change to desired dimension/*
Optimized CUDA kernel for min reduction combining loop unrolling and streamlined indexing.
This kernel logically reshapes the input as [outer, r, inner] and performs reduction along the r dimension.
Each warp (32 threads) computes one output element via warp-level reduction using __shfl_down_sync.
*/
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <vector>
#include <limits>
#include <c10/cuda/CUDAStream.h>
// Helper function to perform warp-level reduction of min
template <typename scalar_t>
__device__ __forceinline__ scalar_t warpReduceMin(scalar_t val) {
// The warp size is assumed to be 32
for (int offset = 16; offset > 0; offset /= 2) {
scalar_t other = __shfl_down_sync(0xffffffff, val, offset);
if (other < val)
val = other;
}
return val;
}
// Combined kernel: each warp computes one output element's min reduction
template <typename scalar_t>
__global__ void min_reduce_combined_kernel(
const scalar_t* __restrict__ input,
scalar_t* __restrict__ output,
int outer,
int r,
int inner) {
const int warpSize = 32;
// Compute global warp id; each warp of 32 threads processes one output element
int warp_id = (blockIdx.x * blockDim.x + threadIdx.x) / warpSize;
if (warp_id >= outer * inner) return;
int lane = threadIdx.x % warpSize; // lane index within the warp
// Map warp_id to corresponding (outer, inner) coordinates
int outer_idx = warp_id / inner;
int inner_idx = warp_id % inner;
int base = outer_idx * (r * inner) + inner_idx;
// Initialize local minimum using maximum possible value
scalar_t local_min = std::numeric_limits<scalar_t>::max();
// Loop over reduction dimension with stride = warpSize and use loop unrolling
#pragma unroll
for (int j = lane; j < r; j += warpSize) {
int idx = base + j * inner;
scalar_t val = input[idx];
local_min = (val < local_min) ? val : local_min;
}
// Perform warp-wide reduction using shuffle operations
local_min = warpReduceMin<scalar_t>(local_min);
// The first lane in the warp writes the result
if (lane == 0) {
output[warp_id] = local_min;
}
}
// Forward function: sets up dimensions, creates output tensor, and launches the kernel
torch::Tensor forward(torch::Tensor input, int64_t dim) {
TORCH_CHECK(input.is_cuda(), "Input must be a CUDA tensor");
if (!input.is_contiguous()) {
input = input.contiguous();
}
int ndim = input.dim();
TORCH_CHECK(dim >= 0 && dim < ndim, "dim out of range");
// Calculate sizes: combine dimensions before and after the reduced dimension
int outer = 1;
for (int i = 0; i < dim; i++) {
outer *= input.size(i);
}
int r = input.size(dim);
int inner = 1;
for (int i = dim + 1; i < ndim; i++) {
inner *= input.size(i);
}
// Build output shape by removing the reduced dimension
std::vector<int64_t> output_shape;
for (int i = 0; i < ndim; i++) {
if (i != dim) {
output_shape.push_back(input.size(i));
}
}
auto output = torch::empty(output_shape, input.options());
// Each warp (32 threads) computes one element of the output
int total_warps = outer * inner;
const int threads_per_block = 128; // e.g., 128 threads per block (4 warps per block)
int num_blocks = (total_warps * 32 + threads_per_block - 1) / threads_per_block;
AT_DISPATCH_ALL_TYPES(input.scalar_type(), "min_reduce_combined_cuda", ([&] {
min_reduce_combined_kernel<scalar_t><<<num_blocks, threads_per_block, 0,
c10::cuda::getCurrentCUDAStream().stream()>>>(
input.data_ptr<scalar_t>(),
output.data_ptr<scalar_t>(),
outer,
r,
inner);
}));
return output;
}
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
m.def("forward", &forward, "Combined optimized min reduction using warp-level primitives (CUDA)");
}
| Metric | Value | Unit | Variance | Samples |
|---|---|---|---|---|
| Executed Ipc Active | 0.356 | inst/cycle | 0.000 | 5 |
| Executed Ipc Elapsed | 0.260 | inst/cycle | 0.000 | 5 |
| Issue Slots Busy | 9.200 | % | 0.008 | 5 |
| Issued Ipc Active | 0.366 | inst/cycle | 0.000 | 5 |
| SM Busy | 9.200 | % | 0.008 | 5 |
| Memory Throughput | 466266267340.176 | byte/second | 9537015368773529600.000 | 5 |
| Mem Busy | 57.448 | % | 0.106 | 5 |
| Max Bandwidth | 16.752 | % | 0.011 | 5 |
| L1/TEX Hit Rate | 74.864 | % | 0.000 | 5 |
| L2 Hit Rate | 62.512 | % | 0.177 | 5 |
| Mem Pipes Busy | 3.276 | % | 0.000 | 5 |
| Warp Cycles Per Issued Instruction | 69.558 | cycle | 0.108 | 5 |
| Warp Cycles Per Executed Instruction | 71.878 | cycle | 0.116 | 5 |
| Avg. Active Threads Per Warp | 30.450 | 0.000 | 5 | |
| Avg. Not Predicated Off Threads Per Warp | 28.040 | 0.000 | 5 | |
| Max Active Clusters | 0.000 | cluster | 0.000 | 5 |
| Max Cluster Size | 8.000 | block | 0.000 | 5 |
| Overall GPU Occupancy | 0.000 | % | 0.000 | 5 |
| Cluster Occupancy | 0.000 | % | 0.000 | 5 |
| Block Limit SM | 32.000 | block | 0.000 | 5 |
| Block Limit Registers | 16.000 | block | 0.000 | 5 |
| Block Limit Shared Mem | 32.000 | block | 0.000 | 5 |
| Block Limit Warps | 16.000 | block | 0.000 | 5 |
| Theoretical Active Warps per SM | 64.000 | warp | 0.000 | 5 |
| Theoretical Occupancy | 100.000 | % | 0.000 | 5 |
| Achieved Occupancy | 40.154 | % | 0.004 | 5 |
| Achieved Active Warps Per SM | 25.698 | warp | 0.002 | 5 |
| Rule | Description |
|---|---|
| WRN HighPipeUtilization | All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details. |
| INF CPIStall | Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason. |
| WRN Occupancy | This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (40.2%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy. |
| Operation / Metric | Value | Unit |
|---|---|---|
| aten::to | ||
| CPU Time | 563242.74 | μs |
| Device Time | 359.39 | μs |
| Self CPU Time | 36.66 | μs |
| Self Device Time | 0.00 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| aten::_to_copy | ||
| CPU Time | 563206.08 | μs |
| Device Time | 359.39 | μs |
| Self CPU Time | 89.61 | μs |
| Self Device Time | 0.00 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| aten::empty_strided | ||
| CPU Time | 562522.59 | μs |
| Device Time | 0.00 | μs |
| Self CPU Time | 88.29 | μs |
| Self Device Time | 0.00 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| cudaDeviceGetStreamPriorityRange | ||
| CPU Time | 562227.94 | μs |
| Device Time | 0.00 | μs |
| Self CPU Time | 562227.94 | μs |
| Self Device Time | 0.00 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| cudaLaunchKernel | ||
| CPU Time | 329034.95 | μs |
| Device Time | 469.57 | μs |
| Self CPU Time | 329034.95 | μs |
| Self Device Time | 469.57 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| void min_reduce_combined_kernel<float>(float const*, float*, int, int, int) | ||
| CPU Time | 0.00 | μs |
| Device Time | 37130.14 | μs |
| Self CPU Time | 0.00 | μs |
| Self Device Time | 37130.14 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| aten::zero_ | ||
| CPU Time | 48868.89 | μs |
| Device Time | 401344.17 | μs |
| Self CPU Time | 8297.47 | μs |
| Self Device Time | 0.00 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| aten::fill_ | ||
| CPU Time | 40572.17 | μs |
| Device Time | 401344.17 | μs |
| Self CPU Time | 10244.97 | μs |
| Self Device Time | 401344.17 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>) | ||
| CPU Time | 0.00 | μs |
| Device Time | 401344.17 | μs |
| Self CPU Time | 0.00 | μs |
| Self Device Time | 401344.17 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
45296 warnings generated when compiling for host. Suppressed 45327 warnings (45280 in non-user code, 47 NOLINT). Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.