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20_ConvTranspose3d_Sum_ResidualAdd_Multiply_ResidualAdd • hybrid_vectorized_tiled_kernel_base

Level 2 • Task 20
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    stride: int,
    padding: int,
    output_padding: int,
    conv_transpose: torch.Tensor,
    conv_transpose_bias: torch.Tensor,
    bias: torch.Tensor,
) -> torch.Tensor:
    """
    Applies a 3D transposed convolution followed by bias addition and residual operations.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_channels, depth, height, width)
        stride (int): Stride of the transposed convolution
        padding (int): Padding of the transposed convolution
        output_padding (int): Additional size added to output shape
        conv_transpose (torch.Tensor): Transposed convolution weight tensor
        conv_transpose_bias (torch.Tensor): Bias tensor for transposed convolution
        bias (torch.Tensor): Bias tensor for addition

    Returns:
        torch.Tensor: Output tensor after applying operations
    """
    x = F.conv_transpose3d(
        x,
        conv_transpose,
        bias=conv_transpose_bias,
        stride=stride,
        padding=padding,
        output_padding=output_padding,
    )
    original_x = x.clone().detach()
    x = x + bias
    x = x + original_x
    x = x * original_x
    x = x + original_x
    return x


class Model(nn.Module):
    """
    Model that performs a 3D transposed convolution, followed by a sum,
    a residual add, a multiplication, and another residual add.
    """

    def __init__(
        self,
        in_channels,
        out_channels,
        kernel_size,
        stride,
        padding,
        output_padding,
        bias_shape,
    ):
        super(Model, self).__init__()
        conv_transpose = nn.ConvTranspose3d(
            in_channels,
            out_channels,
            kernel_size,
            stride=stride,
            padding=padding,
            output_padding=output_padding,
        )
        self.conv_transpose_parameter = conv_transpose.weight
        self.conv_transpose_bias = nn.Parameter(
            conv_transpose.bias + torch.ones_like(conv_transpose.bias) * 0.02
        )  # make sure its nonzero
        self.bias_parameter = nn.Parameter(torch.randn(bias_shape) * 0.02)

    def forward(self, x, stride, padding, output_padding, fn=module_fn):
        return fn(
            x,
            stride,
            padding,
            output_padding,
            self.conv_transpose_parameter,
            self.conv_transpose_bias,
            self.bias_parameter,
        )


batch_size = 16
in_channels = 32
out_channels = 64
depth, height, width = 16, 32, 32
kernel_size = 3
stride = 2
padding = 1
output_padding = 1
bias_shape = (out_channels, 1, 1, 1)


def get_inputs():
    return [
        torch.randn(batch_size, in_channels, depth, height, width),
        stride,
        padding,
        output_padding,
    ]


def get_init_inputs():
    return [
        in_channels,
        out_channels,
        kernel_size,
        stride,
        padding,
        output_padding,
        bias_shape,
    ]

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Model that performs a 3D transposed convolution, followed by a sum, 
    a residual add, a multiplication, and another residual add.
    """
    def __init__(self, in_channels, out_channels, kernel_size, stride, padding, output_padding, bias_shape):
        super(Model, self).__init__()
        self.conv_transpose = nn.ConvTranspose3d(in_channels, out_channels, kernel_size, stride=stride, padding=padding, output_padding=output_padding)
        self.conv_transpose.bias = nn.Parameter(self.conv_transpose.bias + torch.ones_like(self.conv_transpose.bias) * 0.02)
        self.bias = nn.Parameter(torch.randn(bias_shape)*0.02)

    def forward(self, x):
        x = self.conv_transpose(x)
        original_x = x.clone().detach()
        x = x + self.bias
        x = x + original_x
        x = x * original_x
        x = x + original_x
        return x

batch_size = 16
in_channels = 32
out_channels = 64
depth, height, width = 16, 32, 32
kernel_size = 3
stride = 2
padding = 1
output_padding = 1
bias_shape = (out_channels, 1, 1, 1)

def get_inputs():
    return [torch.randn(batch_size, in_channels, depth, height, width)]

def get_init_inputs():
    return [in_channels, out_channels, kernel_size, stride, padding, output_padding, bias_shape]
Download Evaluation Download PyTorch Download CUDA Download Profiles

Kernel Information

Operation Name 20_ConvTranspose3d_Sum_ResidualAdd_Multiply_ResidualAdd
Level ID 2
Task ID 20
Kernel Name hybrid_vectorized_tiled_kernel_base
CUDA Speedup (Native) 2.320x
CUDA Speedup (Compile) 0.718x
CUDA Runtime 1.548 ms
PyTorch Runtime (Native) 3.591 ms
PyTorch Runtime (Compile) 1.111 ms
Correct True
Max Diff (vs. Reference) 0.000000
Model bedrock/anthropic.claude-3-5-sonnet-20241022-v2:0
Temperature 1.00
View Experiment Progress Details

Related Kernels (Level 2, Task 20 • 20_ConvTranspose3d_Sum_ResidualAdd_Multiply_ResidualAdd)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 coalesced_vectorized_fused_kernel_base 1.52 2.36 0.73
🥈 strided_loop_optimization_edit_1 1.54 2.33 0.72
🥉 hybrid_vectorized_tiled_kernel_base 1.55 2.32 0.72
4 coalesced_atomic_selective_kernel_base 1.55 2.32 0.72
4 coalesced_vectorized_access_opt_base 1.55 2.32 0.72
4 hybrid_vectorized_tiled_kernel_edit_1 1.55 2.32 0.72
7 modular_coalesced_kernel_base_base 1.55 2.32 0.72
8 combined_optimized_kernel_base 1.57 2.28 0.71
8 reduced_sync_kernel_base_base 1.57 2.28 0.71
10 minimal_sync_vectorized_base_base 1.58 2.28 0.71
10 ldg_alignment_optimization_base_base 1.58 2.28 0.71
12 unrolled_kernel_optimization_base 1.58 2.28 0.70
12 optimized_block_size_base_base 1.58 2.28 0.70
12 contiguous_remaining_base_base 1.58 2.28 0.70
15 unrolled_vectorized_kernel_base_base 1.58 2.28 0.70
15 shared_mem_tiled_base_base 1.58 2.28 0.70
15 constant_memory_optimized_base 1.58 2.28 0.70
18 optimized_fused_conv3d_vectorized_base 1.58 2.27 0.70
18 sync_optimized_vectorized_base 1.58 2.27 0.70
18 atomic_shared_accumulation_base_base 1.58 2.27 0.70 
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>

#define TILE_SIZE 32
#define BLOCK_SIZE 256

__global__ void hybrid_vectorized_tiled_kernel(
    const float* __restrict__ conv_output,
    const float* __restrict__ element_bias,
    float* output,
    const int num_elements,
    const int channels,
    const int spatial_size
) {
    extern __shared__ float shared_mem[];
    float* shared_bias = shared_mem;

    // Load bias into shared memory cooperatively
    for (int i = threadIdx.x; i < channels; i += blockDim.x) {
        shared_bias[i] = __ldg(&element_bias[i]);
    }
    __syncthreads();

    const int tid = threadIdx.x;
    const int gid = blockIdx.x * blockDim.x + tid;
    const int total_threads = gridDim.x * blockDim.x;

    // Process vectorized elements (float4)
    const int total_vec = num_elements / 4;
    
    #pragma unroll 2
    for (int vec_idx = gid; vec_idx < total_vec; vec_idx += total_threads) {
        // Load 4 elements at once using vectorized load
        float4 in_vec = reinterpret_cast<const float4*>(conv_output)[vec_idx];
        float4 out_vec;
        
        const int base_idx = vec_idx * 4;
        
        #pragma unroll
        for (int j = 0; j < 4; j++) {
            const int curr_idx = base_idx + j;
            const int c = (curr_idx / spatial_size) % channels;
            const float orig = ((float*)&in_vec)[j];
            const float bias_val = shared_bias[c];
            ((float*)&out_vec)[j] = orig * (2.0f * orig + bias_val + 1.0f);
        }
        
        // Vectorized store
        reinterpret_cast<float4*>(output)[vec_idx] = out_vec;
    }

    // Handle remaining elements
    const int start_idx = total_vec * 4;
    #pragma unroll 4
    for (int idx = start_idx + gid; idx < num_elements; idx += total_threads) {
        const int c = (idx / spatial_size) % channels;
        const float original = __ldg(&conv_output[idx]);
        const float bias_val = shared_bias[c];
        output[idx] = original * (2.0f * original + bias_val + 1.0f);
    }
}

torch::Tensor forward(
    torch::Tensor x,
    int stride,
    int padding,
    int output_padding,
    torch::Tensor conv_transpose,
    torch::Tensor conv_transpose_bias,
    torch::Tensor bias
) {
    auto conv_result = torch::conv_transpose3d(
        x, conv_transpose, conv_transpose_bias,
        stride, padding, output_padding
    );

    auto sizes = conv_result.sizes();
    const int channels = sizes[1];
    const int spatial_size = sizes[2] * sizes[3] * sizes[4];
    const int num_elements = conv_result.numel();

    auto output = torch::empty_like(conv_result);

    const int threads_per_block = BLOCK_SIZE;
    const int num_blocks_ = (num_elements + threads_per_block * 4 - 1) / (threads_per_block * 4);
    const int num_blocks = min(num_blocks_, 1024);
    
    const size_t shared_mem_size = channels * sizeof(float);

    hybrid_vectorized_tiled_kernel<<<num_blocks, threads_per_block, shared_mem_size>>>(
        conv_result.data_ptr<float>(),
        bias.data_ptr<float>(),
        output.data_ptr<float>(),
        num_elements,
        channels,
        spatial_size
    );

    return output;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &forward, "Hybrid Vectorized Tiled ConvTranspose3D with Channel-wise Bias");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 2.026 inst/cycle 0.000 5
Executed Ipc Elapsed 1.894 inst/cycle 0.000 5
Issue Slots Busy 50.654 % 0.058 5
Issued Ipc Active 2.028 inst/cycle 0.000 5
SM Busy 50.654 % 0.058 5
Memory Throughput 2796154245931.484 byte/second 589187774579814825984.000 5
Mem Busy 44.374 % 0.152 5
Max Bandwidth 83.420 % 0.526 5
L1/TEX Hit Rate 0.020 % 0.000 5
L2 Hit Rate 50.822 % 0.007 5
Mem Pipes Busy 8.018 % 0.005 5
Warp Cycles Per Issued Instruction 29.074 cycle 0.014 5
Warp Cycles Per Executed Instruction 29.082 cycle 0.013 5
Avg. Active Threads Per Warp 32.000 0.000 5
Avg. Not Predicated Off Threads Per Warp 25.720 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 8.000 block 0.000 5
Block Limit Shared Mem 25.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 91.910 % 0.036 5
Achieved Active Warps Per SM 58.822 warp 0.014 5
Analysis Rules
Rule Description
INF HighPipeUtilization ALU is the highest-utilized pipeline (46.3%) based on active cycles, taking into account the rates of its different instructions. It executes integer and logic operations. It is well-utilized, but should not be a bottleneck.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
INF Occupancy This kernel's theoretical occupancy is not impacted by any block limit.
Operation / Metric Value Unit
aten::conv_transpose3d
CPU Time 1597857.80 μs
Device Time 4281887.88 μs
Self CPU Time 7562.12 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::convolution
CPU Time 1590295.69 μs
Device Time 4281887.88 μs
Self CPU Time 10550.88 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_convolution
CPU Time 1579744.81 μs
Device Time 4281887.88 μs
Self CPU Time 21307.05 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::cudnn_convolution_transpose
CPU Time 462059.24 μs
Device Time 2604905.46 μs
Self CPU Time 139304.73 μs
Self Device Time 2604905.46 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaEventRecord
CPU Time 1573836.28 μs
Device Time 115606.82 μs
Self CPU Time 1573836.28 μs
Self Device Time 115606.82 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 3848031.85 μs
Device Time 58625.49 μs
Self CPU Time 3848031.85 μs
Self Device Time 58625.49 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::add_
CPU Time 1089773.81 μs
Device Time 1676982.42 μs
Self CPU Time 18848.71 μs
Self Device Time 1676982.42 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Failed 
45259 warnings and 1 error generated when compiling for host.
Error while processing /home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu.
Suppressed 45292 warnings (45245 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
Found compiler error(s).
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:9:5 bugprone-easily-swappable-parameters
9 | const float* __restrict__ conv_output,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 | const float* __restrict__ element_bias,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:9:31: note: the first parameter in the range is 'conv_output'
9 | const float* __restrict__ conv_output,
| ^~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:10:31: note: the last parameter in the range is 'element_bias'
10 | const float* __restrict__ element_bias,
| ^~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:12:5: warning: 2 adjacent parameters of 'hybrid_vectorized_tiled_kernel' of similar type ('const int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
12 | const int num_elements,
| ^~~~~~~~~~~~~~~~~~~~~~~
13 | const int channels,
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:12:15: note: the first parameter in the range is 'num_elements'
12 | const int num_elements,
| ^~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:13:15: note: the last parameter in the range is 'channels'
13 | const int channels,
| ^~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:20:18: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
20 | for (int i = threadIdx.x; i < channels; i += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:20:50: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
20 | for (int i = threadIdx.x; i < channels; i += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:25:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
25 | const int tid = threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:26:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
26 | const int gid = blockIdx.x * blockDim.x + tid;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:27:31: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
27 | const int total_threads = gridDim.x * blockDim.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:65:19: warning: the parameter 'x' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
65 | torch::Tensor x,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:69:19: warning: the parameter 'conv_transpose' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
69 | torch::Tensor conv_transpose,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:70:5: warning: 2 adjacent parameters of 'forward' of similar type ('torch::Tensor') are easily swapped by mistake [bugprone-easily-swappable-parameters]
70 | torch::Tensor conv_transpose_bias,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
71 | torch::Tensor bias
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:70:19: note: the first parameter in the range is 'conv_transpose_bias'
70 | torch::Tensor conv_transpose_bias,
| ^~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:71:19: note: the last parameter in the range is 'bias'
71 | torch::Tensor bias
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:71:19: warning: the parameter 'bias' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
71 | torch::Tensor bias
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:79:26: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
79 | const int channels = sizes[1];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:80:30: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
80 | const int spatial_size = sizes[2] * sizes[3] * sizes[4];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:81:30: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
81 | const int num_elements = conv_result.numel();
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_20/b4_s1_hybrid_vectorized_tiled_kernel/base/base.cu:87:28: error: no matching function for call to 'min' [clang-diagnostic-error]
87 | const int num_blocks = min(num_blocks_, 1024);
| ^~~
/home/common_modules/clang-tidy/20.0.0git/lib/clang/20/include/__clang_cuda_math.h:201:16: note: candidate function not viable: call to __device__ function from __host__ function
201 | __DEVICE__ int min(int __a, int __b) { return __nv_min(__a, __b); }
| ^
/usr/local/cuda/include/crt/math_functions.hpp:868:38: note: candidate function not viable: call to __device__ function from __host__ function
868 | __MATH_FUNCTIONS_DECL__ unsigned int min(const unsigned int a, const unsigned int b)
| ^
/usr/local/cuda/include/crt/math_functions.hpp:873:38: note: candidate function not viable: call to __device__ function from __host__ function
873 | __MATH_FUNCTIONS_DECL__ unsigned int min(const int a, const unsigned int b)
| ^
/usr/local/cuda/include/crt/math_functions.hpp:878:38: note: candidate function not viable: call to __device__ function from __host__ function
878 | __MATH_FUNCTIONS_DECL__ unsigned int min(const unsigned int a, const int b)
| ^
/usr/local/cuda/include/crt/math_functions.hpp:883:34: note: candidate function not viable: call to __device__ function from __host__ function
883 | __MATH_FUNCTIONS_DECL__ long int min(const long int a, const long int b)
| ^
/usr/local/cuda/include/crt/math_functions.hpp:902:43: note: candidate function not viable: call to __device__ function from __host__ function
902 | __MATH_FUNCTIONS_DECL__ unsigned long int min(const unsigned long int a, const unsigned long int b)
| ^
/usr/local/cuda/include/crt/math_functions.hpp:919:43: note: candidate function not viable: call to __device__ function from __host__ function
919 | __MATH_FUNCTIONS_DECL__ unsigned long int min(const long int a, const unsigned long int b)
| ^
/usr/local/cuda/include/crt/math_functions.hpp:936:43: note: candidate function not viable: call to __device__ function from __host__ function
936 | __MATH_FUNCTIONS_DECL__ unsigned long int min(const unsigned long int a, const long int b)
| ^
/usr/local/cuda/include/crt/math_functions.hpp:953:39: note: candidate function not viable: call to __device__ function from __host__ function
953 | __MATH_FUNCTIONS_DECL__ long long int min(const long long int a, const long long int b)
| ^
/usr/local/cuda/include/crt/math_functions.hpp:958:48: note: candidate function not viable: call to __device__ function from __host__ function
958 | __MATH_FUNCTIONS_DECL__ unsigned long long int min(const unsigned long long int a, const unsigned long long int b)
| ^
/usr/local/cuda/include/crt/math_functions.hpp:963:48: note: candidate function not viable: call to __device__ function from __host__ function
963 | __MATH_FUNCTIONS_DECL__ unsigned long long int min(const long long int a, const unsigned long long int b)
| ^
/usr/local/cuda/include/crt/math_functions.hpp:968:48: note: candidate function not viable: call to __device__ function from __host__ function
968 | __MATH_FUNCTIONS_DECL__ unsigned long long int min(const unsigned long long int a, const long long int b)
| ^
/usr/local/cuda/include/crt/math_functions.hpp:973:31: note: candidate function not viable: call to __device__ function from __host__ function
973 | __MATH_FUNCTIONS_DECL__ float min(const float a, const float b)
| ^
/usr/local/cuda/include/crt/math_functions.hpp:978:32: note: candidate function not viable: call to __device__ function from __host__ function
978 | __MATH_FUNCTIONS_DECL__ double min(const double a, const double b)
| ^
/usr/local/cuda/include/crt/math_functions.hpp:983:32: note: candidate function not viable: call to __device__ function from __host__ function
983 | __MATH_FUNCTIONS_DECL__ double min(const float a, const double b)
| ^
/usr/local/cuda/include/crt/math_functions.hpp:988:32: note: candidate function not viable: call to __device__ function from __host__ function
988 | __MATH_FUNCTIONS_DECL__ double min(const double a, const float b)
| ^