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54_Conv2d_Multiply_LeakyReLU_GELU • direct_3d_indexing_base

Level 2 • Task 54
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    conv_weight: torch.Tensor,
    conv_bias: torch.Tensor,
    multiplier: torch.Tensor,
) -> torch.Tensor:
    """
    Applies convolution, scalar multiplication, LeakyReLU and GELU.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_channels, height, width)
        conv_weight (torch.Tensor): Convolution weights of shape (out_channels, in_channels, kernel_size, kernel_size)
        conv_bias (torch.Tensor): Convolution bias of shape (out_channels)
        multiplier (torch.Tensor): Learnable scalar of shape (out_channels, 1, 1)

    Returns:
        torch.Tensor: Output tensor after applying convolution, multiplication, LeakyReLU and GELU
    """
    x = F.conv2d(x, conv_weight, bias=conv_bias)
    x = x * multiplier
    x = F.leaky_relu(x)
    x = F.gelu(x)
    return x


class Model(nn.Module):
    """
    Model that performs a convolution, multiplies by a learnable scalar, applies LeakyReLU, and then GELU.
    """

    def __init__(self, in_channels, out_channels, kernel_size, multiplier_shape):
        super(Model, self).__init__()
        conv = nn.Conv2d(in_channels, out_channels, kernel_size)
        self.conv_weight = nn.Parameter(conv.weight)
        self.conv_bias = nn.Parameter(conv.bias)
        self.multiplier = nn.Parameter(torch.randn(multiplier_shape) * 0.02)

    def forward(self, x, fn=module_fn):
        return fn(x, self.conv_weight, self.conv_bias, self.multiplier)


batch_size = 128
in_channels = 3
out_channels = 16
height, width = 32, 32
kernel_size = 3
multiplier_shape = (out_channels, 1, 1)


def get_inputs():
    return [torch.randn(batch_size, in_channels, height, width)]


def get_init_inputs():
    return [in_channels, out_channels, kernel_size, multiplier_shape]

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Model that performs a convolution, multiplies by a learnable scalar, applies LeakyReLU, and then GELU.
    """
    def __init__(self, in_channels, out_channels, kernel_size, multiplier_shape):
        super(Model, self).__init__()
        self.conv = nn.Conv2d(in_channels, out_channels, kernel_size)
        self.multiplier = nn.Parameter(torch.randn(multiplier_shape) * 0.02) 
        self.leaky_relu = nn.LeakyReLU()

    def forward(self, x):
        x = self.conv(x)
        x = x * self.multiplier
        x = self.leaky_relu(x)
        x = torch.nn.functional.gelu(x)
        return x

batch_size = 128
in_channels = 3
out_channels = 16
height, width = 32, 32
kernel_size = 3
multiplier_shape = (out_channels, 1, 1)

def get_inputs():
    return [torch.randn(batch_size, in_channels, height, width)]

def get_init_inputs():
    return [in_channels, out_channels, kernel_size, multiplier_shape]
Download Evaluation Download PyTorch Download CUDA Download Profiles

Kernel Information

Operation Name 54_Conv2d_Multiply_LeakyReLU_GELU
Level ID 2
Task ID 54
Kernel Name direct_3d_indexing_base
CUDA Speedup (Native) 1.281x
CUDA Speedup (Compile) 1.440x
CUDA Runtime 0.039 ms
PyTorch Runtime (Native) 0.050 ms
PyTorch Runtime (Compile) 0.056 ms
Correct True
Max Diff (vs. Reference) 0.000000
Model o3-mini-2025-01-31
Temperature 1.00
View Experiment Progress Details

Related Kernels (Level 2, Task 54 • 54_Conv2d_Multiply_LeakyReLU_GELU)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 54_Conv2d_Multiply_LeakyReLU_GELU 0.04 1.28 1.44
🥇 balanced_workload_distribution_base 0.04 1.28 1.44
🥇 warp_divergence_optimized_base 0.04 1.28 1.44
🥇 optimized_block_size_128_base 0.04 1.28 1.44
🥇 optimized_convolution_with_tunable_blocksize_base 0.04 1.28 1.44
🥇 direct_3d_indexing_opt_base 0.04 1.28 1.44
🥇 direct_3d_indexing_base 0.04 1.28 1.44
🥇 unroll_loops_54conv_edit_1 0.04 1.28 1.44
🥇 dynamic_block_size_54conv_base 0.04 1.28 1.44
🥇 threadblock_3d_mapping_base 0.04 1.28 1.44
🥇 balanced_thread_distribution_base 0.04 1.28 1.44
🥇 branchless_no_divergence_54conv_base 0.04 1.28 1.44
🥇 modular_device_functions_base 0.04 1.28 1.44
🥇 tile_based_2d_indexing_base 0.04 1.28 1.44
15 combined_conv_act_base 0.04 1.25 1.40
15 optimized_stride_loop_base 0.04 1.25 1.40
15 unroll_loops_54conv_base 0.04 1.25 1.40
15 54_Conv2d_Multiply_LeakyReLU_GELU_warp_divergence_reduction_base 0.04 1.25 1.40
15 dynamic_block_size_54conv_edit_1 0.04 1.25 1.40
15 modular_device_functions_edit_1 0.04 1.25 1.40 
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <cstdio>
#include <cmath>

// Device function: GELU approximation using tanhf
__device__ inline float gelu(float x) {
    const float k0 = 0.7978845608028654f; // sqrt(2/pi)
    return 0.5f * x * (1.0f + tanhf(k0 * (x + 0.044715f * x * x * x)));
}

// CUDA kernel with direct 3D indexing for efficient thread mapping
// Maps blockIdx.x and threadIdx.x to output width, blockIdx.y and threadIdx.y to output height
// and uses blockIdx.z to cover (batch_size * out_channels), eliminating extra modular arithmetic
__global__ void conv_forward_kernel_3d(
    const float* __restrict__ input,
    const float* __restrict__ weight,
    const float* __restrict__ bias,
    const float* __restrict__ multiplier,
    float* __restrict__ output,
    int batch_size,
    int in_channels,
    int input_h,
    int input_w,
    int out_channels,
    int kernel_size,
    int output_h,
    int output_w
) {
    // Compute spatial indices using 2D block and thread indices
    int ow = blockIdx.x * blockDim.x + threadIdx.x;
    int oh = blockIdx.y * blockDim.y + threadIdx.y;

    // Use the z-dimension to index over (batch * channel) pairs
    int bc = blockIdx.z;
    int n = bc / out_channels;
    int oc = bc % out_channels;

    if (ow < output_w && oh < output_h) {
        float sum = bias[oc];

        // Convolve over the input channels and kernel window
        for (int ic = 0; ic < in_channels; ++ic) {
            for (int i = 0; i < kernel_size; ++i) {
                for (int j = 0; j < kernel_size; ++j) {
                    int in_h = oh + i;  // stride = 1, no padding assumed
                    int in_w = ow + j;
                    int input_idx = ((n * in_channels + ic) * input_h + in_h) * input_w + in_w;
                    int weight_idx = ((oc * in_channels + ic) * kernel_size + i) * kernel_size + j;
                    sum += input[input_idx] * weight[weight_idx];
                }
            }
        }

        // Apply channel-specific multiplication
        sum *= multiplier[oc];

        // Apply LeakyReLU activation in a branchless manner
        sum = fmaxf(sum, 0.01f * sum);

        // Apply GELU activation
        float out_val = gelu(sum);

        // Write the computed value to the output tensor
        int output_idx = ((n * out_channels + oc) * output_h + oh) * output_w + ow;
        output[output_idx] = out_val;
    }
}

// C++ interface called by Python via pybind11
// Extracts tensor dimensions, allocates the output tensor, and launches the CUDA kernel
torch::Tensor forward_cuda(
    torch::Tensor input,
    torch::Tensor conv_weight,
    torch::Tensor conv_bias,
    torch::Tensor multiplier
) {
    // Get dimensions of the input tensor: [batch_size, in_channels, input_h, input_w]
    const int batch_size = input.size(0);
    const int in_channels = input.size(1);
    const int input_h = input.size(2);
    const int input_w = input.size(3);

    // Get convolution parameters from weight tensor: [out_channels, in_channels, kernel_size, kernel_size]
    const int out_channels = conv_weight.size(0);
    const int kernel_size = conv_weight.size(2);
    const int output_h = input_h - kernel_size + 1;
    const int output_w = input_w - kernel_size + 1;

    // Allocate output tensor
    auto output = torch::empty({batch_size, out_channels, output_h, output_w}, input.options());

    // Define block dimensions for spatial mapping
    dim3 block(16, 16, 1);
    // Grid dimensions: x covers output width, y covers output height,
    // and z covers the combined batch and channel dimensions
    dim3 grid((output_w + block.x - 1) / block.x,
              (output_h + block.y - 1) / block.y,
              batch_size * out_channels);

    // Launch the CUDA kernel with direct 3D indexing
    conv_forward_kernel_3d<<<grid, block>>>(
        input.data_ptr<float>(),
        conv_weight.data_ptr<float>(),
        conv_bias.data_ptr<float>(),
        multiplier.data_ptr<float>(),
        output.data_ptr<float>(),
        batch_size,
        in_channels,
        input_h,
        input_w,
        out_channels,
        kernel_size,
        output_h,
        output_w
    );

    // Check for kernel launch errors
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        printf("CUDA kernel failed: %s\n", cudaGetErrorString(err));
    }

    return output;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &forward_cuda, "3D direct indexing convolution with scalar multiplication, LeakyReLU, and GELU (CUDA)");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 3.044 inst/cycle 0.000 5
Executed Ipc Elapsed 2.828 inst/cycle 0.000 5
Issue Slots Busy 76.138 % 0.053 5
Issued Ipc Active 3.046 inst/cycle 0.000 5
SM Busy 76.138 % 0.053 5
Memory Throughput 36870082851.078 byte/second 23262347553931188.000 5
Mem Busy 61.554 % 0.102 5
Max Bandwidth 41.944 % 0.047 5
L1/TEX Hit Rate 87.254 % 0.002 5
L2 Hit Rate 92.712 % 0.038 5
Mem Pipes Busy 55.576 % 0.082 5
Warp Cycles Per Issued Instruction 16.272 cycle 0.000 5
Warp Cycles Per Executed Instruction 16.286 cycle 0.000 5
Avg. Active Threads Per Warp 30.180 0.000 5
Avg. Not Predicated Off Threads Per Warp 28.060 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 8.000 block 0.000 5
Block Limit Shared Mem 32.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 77.798 % 0.012 5
Achieved Active Warps Per SM 49.790 warp 0.005 5
Analysis Rules
Rule Description
INF HighPipeUtilization ALU is the highest-utilized pipeline (38.3%) based on active cycles, taking into account the rates of its different instructions. It executes integer and logic operations. It is well-utilized, but should not be a bottleneck.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (77.8%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 267556.25 μs
Device Time 84.32 μs
Self CPU Time 50.73 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 267505.52 μs
Device Time 84.32 μs
Self CPU Time 91.20 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 267022.42 μs
Device Time 0.00 μs
Self CPU Time 110.38 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 266444.31 μs
Device Time 0.00 μs
Self CPU Time 266444.31 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 730411.39 μs
Device Time 704.80 μs
Self CPU Time 730411.39 μs
Self Device Time 704.80 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
conv_forward_kernel_3d(float const*, float const*, float const*, float const*, float*, int, int, int, int, int, int, int, int)
CPU Time 0.00 μs
Device Time 289063.40 μs
Self CPU Time 0.00 μs
Self Device Time 289063.40 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 246056.20 μs
Device Time 627704.32 μs
Self CPU Time 13110.16 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 232947.73 μs
Device Time 627704.32 μs
Self CPU Time 17306.38 μs
Self Device Time 627704.32 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 627704.32 μs
Self CPU Time 0.00 μs
Self Device Time 627704.32 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed 
45293 warnings generated when compiling for host.
Suppressed 45324 warnings (45277 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:18:5 bugprone-easily-swappable-parameters
18 | const float* __restrict__ weight,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
19 | const float* __restrict__ bias,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
20 | const float* __restrict__ multiplier,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:18:31: note: the first parameter in the range is 'weight'
18 | const float* __restrict__ weight,
| ^~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:20:31: note: the last parameter in the range is 'multiplier'
20 | const float* __restrict__ multiplier,
| ^~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:22:5: warning: 2 adjacent parameters of 'conv_forward_kernel_3d' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
22 | int batch_size,
| ^~~~~~~~~~~~~~~
23 | int in_channels,
| ~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:22:9: note: the first parameter in the range is 'batch_size'
22 | int batch_size,
| ^~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:23:9: note: the last parameter in the range is 'in_channels'
23 | int in_channels,
| ^~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:25:5: warning: 3 adjacent parameters of 'conv_forward_kernel_3d' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
25 | int input_w,
| ^~~~~~~~~~~~
26 | int out_channels,
| ~~~~~~~~~~~~~~~~~
27 | int kernel_size,
| ~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:25:9: note: the first parameter in the range is 'input_w'
25 | int input_w,
| ^~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:27:9: note: the last parameter in the range is 'kernel_size'
27 | int kernel_size,
| ^~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:32:14: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
32 | int ow = blockIdx.x * blockDim.x + threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:33:14: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
33 | int oh = blockIdx.y * blockDim.y + threadIdx.y;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:36:14: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
36 | int bc = blockIdx.z;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:74:19: warning: the parameter 'input' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
74 | torch::Tensor input,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:75:19: warning: the parameter 'conv_weight' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
75 | torch::Tensor conv_weight,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:76:19: warning: the parameter 'conv_bias' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
76 | torch::Tensor conv_bias,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:77:19: warning: the parameter 'multiplier' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
77 | torch::Tensor multiplier
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:80:28: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
80 | const int batch_size = input.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:81:29: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
81 | const int in_channels = input.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:82:25: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
82 | const int input_h = input.size(2);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:83:25: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
83 | const int input_w = input.size(3);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:86:30: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
86 | const int out_channels = conv_weight.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_54/b10_s0_direct_3d_indexing/base/base.cu:87:29: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
87 | const int kernel_size = conv_weight.size(2);
| ^