← Back to Leaderboard

The AI CUDA Engineer 👷

78_ConvTranspose3d_Max_Max_Sumunrolled_78_convtranspose3d_optimized_base

Level 2 • Task 78
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    stride: int,
    padding: int,
    conv_transpose: torch.Tensor,
    conv_transpose_bias: torch.Tensor,
) -> torch.Tensor:
    """
    Applies a 3D transposed convolution operation followed by two max pooling layers and a sum operation.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_channels, depth, height, width)
        stride (int): Stride of the transposed convolution
        padding (int): Padding of the transposed convolution
        conv_transpose (torch.Tensor): Transposed convolution weight tensor
        conv_transpose_bias (torch.Tensor): Bias tensor for transposed convolution

    Returns:
        torch.Tensor: Output tensor after applying transposed convolution, max pooling and sum reduction
    """
    x = F.conv_transpose3d(
        x, conv_transpose, bias=conv_transpose_bias, stride=stride, padding=padding
    )
    x = F.max_pool3d(x, kernel_size=2)
    x = F.max_pool3d(x, kernel_size=3)
    x = torch.sum(x, dim=1, keepdim=True)
    return x


class Model(nn.Module):
    """
    Model that performs a 3D transposed convolution, followed by two max pooling layers and a sum operation.
    """

    def __init__(self, in_channels, out_channels, kernel_size, stride, padding):
        super(Model, self).__init__()
        conv = nn.ConvTranspose3d(in_channels, out_channels, kernel_size)
        self.conv_transpose_parameter = nn.Parameter(conv.weight)
        self.conv_transpose_bias = nn.Parameter(conv.bias)

    def forward(self, x, stride, padding, fn=module_fn):
        return fn(
            x, stride, padding, self.conv_transpose_parameter, self.conv_transpose_bias
        )


batch_size = 16
in_channels = 8
out_channels = 16
depth, height, width = 16, 32, 32
kernel_size = 3
stride = 2
padding = 1


def get_inputs():
    return [torch.randn(batch_size, in_channels, depth, height, width), stride, padding]


def get_init_inputs():
    return [in_channels, out_channels, kernel_size, stride, padding]
import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Model that performs a 3D transposed convolution, followed by two max pooling layers and a sum operation.
    """
    def __init__(self, in_channels, out_channels, kernel_size, stride, padding):
        super(Model, self).__init__()
        self.conv_transpose = nn.ConvTranspose3d(in_channels, out_channels, kernel_size, stride=stride, padding=padding)
        self.max_pool1 = nn.MaxPool3d(kernel_size=2)
        self.max_pool2 = nn.MaxPool3d(kernel_size=3)

    def forward(self, x):
        x = self.conv_transpose(x)
        x = self.max_pool1(x)
        x = self.max_pool2(x)
        x = torch.sum(x, dim=1, keepdim=True) 
        return x

batch_size = 16
in_channels = 8
out_channels = 16
depth, height, width = 16, 32, 32
kernel_size = 3
stride = 2
padding = 1

def get_inputs():
    return [torch.randn(batch_size, in_channels, depth, height, width)]

def get_init_inputs():
    return [in_channels, out_channels, kernel_size, stride, padding]

Kernel Information

Related Kernels (Level 2, Task 78 • 78_ConvTranspose3d_Max_Max_Sum)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 optimized_maxpool_kernel_base 0.58 1.05 1.21
🥇 adaptive_blocksize_maxpool_opt_base 0.58 1.05 1.21
🥉 minimized_divergence_maxpool_base_base 0.58 1.05 1.21
4 unrolled_78_convtranspose3d_optimized_base 0.59 1.03 1.19
4 modular_maxpool_kernel_base 0.59 1.03 1.19
6 fully_unrolled_maxpool_base_base 0.59 1.03 1.19
7 balanced_load_distribution_maxpool_base 0.59 1.03 1.19
8 manual_unroll_maxpool_base_base 0.59 1.03 1.19
9 coalesced_maxpool_shared_mem_base 0.60 1.02 1.18
10 unrolled_78_convtranspose3d_base 0.61 1.01 1.16
11 78_ConvTranspose3d_Max_Max_Sum 0.61 1.00 1.16
12 unroll_conv3d_max_sum_base 0.61 1.00 1.15
13 modular_conv3d_max_sum_edit_1 0.61 1.00 1.15
13 modular_conv3d_max_sum_base 0.61 1.00 1.15
13 shared_mem_reduction_max_sum_base 0.61 1.00 1.15
13 unroll_conv3d_max_sum_edit_1 0.61 1.00 1.15
17 optimized_stride_max_pool_base 0.61 1.00 1.15
17 shared_mem_reduction_max_sum_edit_1 0.61 1.00 1.15
19 constant_memory_optimization_base_edit_1 0.62 0.99 1.14
19 balanced_workload_distribution_base 0.62 0.99 1.14
#include <torch/extension.h>
#include <ATen/ATen.h>
#include <cuda.h>
#include <cuda_runtime.h>

__global__ void optimized_maxpool_kernel(
    const float* __restrict__ input,
    float* __restrict__ output,
    const int N, const int C,
    const int D1, const int H1, const int W1,  // Dimensions after conv_transpose
    const int D2, const int H2, const int W2,  // Dimensions after first maxpool
    const int D3, const int H3, const int W3)  // Final dimensions
{
    const int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= N * C * D3 * H3 * W3) return;

    // Decode output index
    const int w3 = idx % W3;
    const int h3 = (idx / W3) % H3;
    const int d3 = (idx / (W3 * H3)) % D3;
    const int c = (idx / (W3 * H3 * D3)) % C;
    const int n = idx / (W3 * H3 * D3 * C);

    // Calculate starting indices for the 3x3x3 window in the first maxpool output
    const int start_d2 = d3 * 3;
    const int start_h2 = h3 * 3;
    const int start_w2 = w3 * 3;

    float final_max = -FLT_MAX;

    // Fully unrolled 3x3x3 maxpool over the 2x2x2 maxpool results
    #pragma unroll
    for (int d2_offset = 0; d2_offset < 3; d2_offset++) {
        const int d2 = start_d2 + d2_offset;
        if (d2 >= D2) continue;

        #pragma unroll
        for (int h2_offset = 0; h2_offset < 3; h2_offset++) {
            const int h2 = start_h2 + h2_offset;
            if (h2 >= H2) continue;

            #pragma unroll
            for (int w2_offset = 0; w2_offset < 3; w2_offset++) {
                const int w2 = start_w2 + w2_offset;
                if (w2 >= W2) continue;

                // For each position in the 3x3x3 window, compute 2x2x2 maxpool
                float local_max = -FLT_MAX;

                // Starting indices for the 2x2x2 window in the original input
                const int start_d1 = d2 * 2;
                const int start_h1 = h2 * 2;
                const int start_w1 = w2 * 2;

                // Fully unrolled 2x2x2 maxpool
                #pragma unroll
                for (int d1_offset = 0; d1_offset < 2; d1_offset++) {
                    const int d1 = start_d1 + d1_offset;
                    if (d1 >= D1) continue;

                    #pragma unroll
                    for (int h1_offset = 0; h1_offset < 2; h1_offset++) {
                        const int h1 = start_h1 + h1_offset;
                        if (h1 >= H1) continue;

                        #pragma unroll
                        for (int w1_offset = 0; w1_offset < 2; w1_offset++) {
                            const int w1 = start_w1 + w1_offset;
                            if (w1 >= W1) continue;

                            const int input_idx = ((n * C + c) * D1 + d1) * H1 * W1 + h1 * W1 + w1;
                            local_max = max(local_max, input[input_idx]);
                        }
                    }
                }

                final_max = max(final_max, local_max);
            }
        }
    }

    output[idx] = final_max;
}

torch::Tensor forward(
    torch::Tensor x,
    int64_t stride,
    int64_t padding,
    torch::Tensor conv_transpose,
    torch::Tensor conv_transpose_bias) {

    x = x.contiguous();
    conv_transpose = conv_transpose.contiguous();
    conv_transpose_bias = conv_transpose_bias.contiguous();

    TORCH_CHECK(x.is_cuda(), "Input x must be a CUDA tensor");
    TORCH_CHECK(conv_transpose.is_cuda(), "conv_transpose must be a CUDA tensor");
    TORCH_CHECK(conv_transpose_bias.is_cuda(), "conv_transpose_bias must be a CUDA tensor");

    // Apply transposed convolution using ATen op
    x = at::conv_transpose3d(
        x,
        conv_transpose,
        conv_transpose_bias,
        {stride, stride, stride},
        {padding, padding, padding}
    );

    // Get dimensions after conv_transpose
    auto sizes = x.sizes();
    const int N = sizes[0];
    const int C = sizes[1];
    const int D1 = sizes[2];
    const int H1 = sizes[3];
    const int W1 = sizes[4];

    // Calculate dimensions after first maxpool (2x2x2)
    const int D2 = D1 / 2;
    const int H2 = H1 / 2;
    const int W2 = W1 / 2;

    // Calculate final dimensions after second maxpool (3x3x3)
    const int D3 = D2 / 3;
    const int H3 = H2 / 3;
    const int W3 = W2 / 3;

    // Allocate output tensor
    auto output = torch::empty({N, C, D3, H3, W3}, x.options());

    // Launch kernel
    const int total_elements = N * C * D3 * H3 * W3;
    const int threads = 256;
    const int blocks = (total_elements + threads - 1) / threads;

    optimized_maxpool_kernel<<<blocks, threads>>>(
        x.data_ptr<float>(),
        output.data_ptr<float>(),
        N, C, D1, H1, W1, D2, H2, W2, D3, H3, W3
    );

    // Sum over channels
    return output.sum(1, /*keepdim=*/true);
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &forward, "Forward pass with optimized unrolled maxpool operations");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.792 inst/cycle 0.000 5
Executed Ipc Elapsed 0.684 inst/cycle 0.000 5
Issue Slots Busy 19.794 % 0.005 5
Issued Ipc Active 0.792 inst/cycle 0.000 5
SM Busy 19.794 % 0.005 5
Memory Throughput 2075259329422.910 byte/second 257094933503184633856.000 5
Mem Busy 36.338 % 0.077 5
Max Bandwidth 61.942 % 0.226 5
L1/TEX Hit Rate 81.254 % 0.000 5
L2 Hit Rate 13.542 % 0.002 5
Mem Pipes Busy 7.200 % 0.004 5
Warp Cycles Per Issued Instruction 35.488 cycle 0.019 5
Warp Cycles Per Executed Instruction 35.524 cycle 0.019 5
Avg. Active Threads Per Warp 32.000 0.000 5
Avg. Not Predicated Off Threads Per Warp 28.400 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 6.000 block 0.000 5
Block Limit Shared Mem 32.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 48.000 warp 0.000 5
Theoretical Occupancy 75.000 % 0.000 5
Achieved Occupancy 43.954 % 0.000 5
Achieved Active Warps Per SM 28.132 warp 0.000 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy (75.0%) is limited by the number of required registers. The difference between calculated theoretical (75.0%) and measured achieved occupancy (43.9%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::conv_transpose3d
CPU Time 5513403.81 μs
Device Time 4979433.75 μs
Self CPU Time 18103.47 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::convolution
CPU Time 5495300.34 μs
Device Time 4979433.75 μs
Self CPU Time 23005.24 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_convolution
CPU Time 5472295.10 μs
Device Time 4979433.75 μs
Self CPU Time 50927.80 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::cudnn_convolution_transpose
CPU Time 4870027.91 μs
Device Time 3931106.60 μs
Self CPU Time 240083.97 μs
Self Device Time 3931100.10 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaMemsetAsync
CPU Time 2251135.42 μs
Device Time 0.00 μs
Self CPU Time 2251135.42 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
sm90_xmma_dgrad_implicit_gemm_indexed_f32f32_tf32f32_f32_nhwckrsc_nhwc_tilesize256x64x32_warpgroupsize1x1x1_g1_strided_execute_kernel__5x_cudnn
CPU Time 0.00 μs
Device Time 2505462.16 μs
Self CPU Time 0.00 μs
Self Device Time 2505462.16 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed
45286 warnings generated when compiling for host.
Suppressed 45325 warnings (45278 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_78/b5_s3_unrolled_78_convtranspose3d_optimized/base/base.cu:10:33 bugprone-easily-swappable-parameters
10 | const int D1, const int H1, const int W1, // Dimensions after conv_transpose
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
11 | const int D2, const int H2, const int W2, // Dimensions after first maxpool
| ~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_78/b5_s3_unrolled_78_convtranspose3d_optimized/base/base.cu:10:43: note: the first parameter in the range is 'W1'
10 | const int D1, const int H1, const int W1, // Dimensions after conv_transpose
| ^~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_78/b5_s3_unrolled_78_convtranspose3d_optimized/base/base.cu:11:15: note: the last parameter in the range is 'D2'
11 | const int D2, const int H2, const int W2, // Dimensions after first maxpool
| ^~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_78/b5_s3_unrolled_78_convtranspose3d_optimized/base/base.cu:11:33: warning: 2 adjacent parameters of 'optimized_maxpool_kernel' of similar type ('const int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
11 | const int D2, const int H2, const int W2, // Dimensions after first maxpool
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 | const int D3, const int H3, const int W3) // Final dimensions
| ~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_78/b5_s3_unrolled_78_convtranspose3d_optimized/base/base.cu:11:43: note: the first parameter in the range is 'W2'
11 | const int D2, const int H2, const int W2, // Dimensions after first maxpool
| ^~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_78/b5_s3_unrolled_78_convtranspose3d_optimized/base/base.cu:12:15: note: the last parameter in the range is 'D3'
12 | const int D3, const int H3, const int W3) // Final dimensions
| ^~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_78/b5_s3_unrolled_78_convtranspose3d_optimized/base/base.cu:14:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
14 | const int idx = blockIdx.x * blockDim.x + threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_78/b5_s3_unrolled_78_convtranspose3d_optimized/base/base.cu:111:19: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
111 | const int N = sizes[0];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_78/b5_s3_unrolled_78_convtranspose3d_optimized/base/base.cu:112:19: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
112 | const int C = sizes[1];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_78/b5_s3_unrolled_78_convtranspose3d_optimized/base/base.cu:113:20: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
113 | const int D1 = sizes[2];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_78/b5_s3_unrolled_78_convtranspose3d_optimized/base/base.cu:114:20: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
114 | const int H1 = sizes[3];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_78/b5_s3_unrolled_78_convtranspose3d_optimized/base/base.cu:115:20: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
115 | const int W1 = sizes[4];
| ^