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88_Gemm_GroupNorm_Swish_Multiply_Swish • unrolled_groupnorm_kernel_base

Level 2 • Task 88
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    gemm_weight: torch.Tensor,
    gemm_bias: torch.Tensor,
    group_norm_weight: torch.Tensor,
    group_norm_bias: torch.Tensor,
    multiply_weight: torch.Tensor,
    num_groups: int,
) -> torch.Tensor:
    """
    Performs GEMM, GroupNorm, Swish, Multiply, and Swish operations.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_features)
        gemm_weight (torch.Tensor): Weight matrix for linear layer of shape (out_features, in_features)
        gemm_bias (torch.Tensor): Bias vector for linear layer of shape (out_features)
        group_norm_weight (torch.Tensor): Weight parameter for group norm of shape (out_features)
        group_norm_bias (torch.Tensor): Bias parameter for group norm of shape (out_features)
        multiply_weight (torch.Tensor): Weight tensor for multiplication of shape (out_features)
        num_groups (int): Number of groups for group normalization

    Returns:
        torch.Tensor: Output tensor of shape (batch_size, out_features)
    """
    x = F.linear(x, gemm_weight, gemm_bias)
    x = F.group_norm(x, num_groups, group_norm_weight, group_norm_bias)
    x = x * torch.sigmoid(x)
    x = x * multiply_weight
    x = x * torch.sigmoid(x)
    return x


class Model(nn.Module):
    """
    Model that performs a GEMM, GroupNorm, Swish, Multiply, and Swish operations.
    """

    def __init__(self, in_features, out_features, num_groups, multiply_weight_shape):
        super(Model, self).__init__()
        gemm = nn.Linear(in_features, out_features)
        self.gemm_weight = gemm.weight
        self.gemm_bias = gemm.bias
        group_norm = nn.GroupNorm(num_groups, out_features)
        self.group_norm_weight = group_norm.weight
        self.group_norm_bias = group_norm.bias
        self.multiply_weight = nn.Parameter(torch.randn(multiply_weight_shape) * 0.02)
        self.num_groups = num_groups

    def forward(self, x, fn=module_fn):
        return fn(
            x,
            self.gemm_weight,
            self.gemm_bias,
            self.group_norm_weight,
            self.group_norm_bias,
            self.multiply_weight,
            self.num_groups,
        )


batch_size = 128
in_features = 512
out_features = 1024
num_groups = 16
multiply_weight_shape = (out_features,)


def get_inputs():
    return [torch.randn(batch_size, in_features)]


def get_init_inputs():
    return [in_features, out_features, num_groups, multiply_weight_shape]

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Model that performs a GEMM, GroupNorm, Swish, Multiply, and Swish operations.
    """
    def __init__(self, in_features, out_features, num_groups, multiply_weight_shape):
        super(Model, self).__init__()
        self.gemm = nn.Linear(in_features, out_features)
        self.group_norm = nn.GroupNorm(num_groups, out_features)
        self.multiply_weight = nn.Parameter(torch.randn(multiply_weight_shape) * 0.02) 

    def forward(self, x):
        # (batch_size, in_features) -> (batch_size, out_features)
        x = self.gemm(x)
        # (batch_size, out_features) -> (batch_size, out_features)
        x = self.group_norm(x)
        # (batch_size, out_features) -> (batch_size, out_features)
        x = x * torch.sigmoid(x)
        # (batch_size, out_features) -> (batch_size, out_features)
        x = x * self.multiply_weight
        # (batch_size, out_features) -> (batch_size, out_features)
        x = x * torch.sigmoid(x)
        return x

batch_size = 128
in_features = 512
out_features = 1024
num_groups = 16
multiply_weight_shape = (out_features,)

def get_inputs():
    return [torch.randn(batch_size, in_features)]

def get_init_inputs():
    return [in_features, out_features, num_groups, multiply_weight_shape]
Download Evaluation Download PyTorch Download CUDA Download Profiles

Kernel Information

Operation Name 88_Gemm_GroupNorm_Swish_Multiply_Swish
Level ID 2
Task ID 88
Kernel Name unrolled_groupnorm_kernel_base
CUDA Speedup (Native) 1.737x
CUDA Speedup (Compile) 1.756x
CUDA Runtime 0.027 ms
PyTorch Runtime (Native) 0.047 ms
PyTorch Runtime (Compile) 0.047 ms
Correct True
Max Diff (vs. Reference) 0.000000
Model azure-gpt-4o-2024-08-06
Temperature 1.00
View Experiment Progress Details

Related Kernels (Level 2, Task 88 • 88_Gemm_GroupNorm_Swish_Multiply_Swish)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 fused_multistream_base 0.02 1.95 1.98
🥇 pipelined_88_gemm_groupnorm_swish_edit_1 0.02 1.95 1.98
🥇 minimal_sync_88_gemm_groupnorm_swish_base 0.02 1.95 1.98
4 optimized_module_fn_kernel_edit_1 0.03 1.88 1.90
5 unrolled_groupnorm_kernel_base 0.03 1.74 1.76
5 88_gemm_groupnorm_swish_multiply_swish_atomic_optimized_base 0.03 1.74 1.76
5 88_gemm_groupnorm_swish_multiply_swish_shared_warp_reduction_base 0.03 1.74 1.76
5 optimized_fused_groupnorm_swish_base 0.03 1.74 1.76
5 88_Gemm_GroupNorm_Swish_Multiply_Swish_unroll_base_base 0.03 1.74 1.76
5 88_gemm_groupnorm_swish_multiply_swish_2d_base 0.03 1.74 1.76
5 88_gemm_groupnorm_swish_multiply_swish_uniform_control_flow_base 0.03 1.74 1.76
5 88_gemm_groupnorm_swish_multiply_swish_warp_base 0.03 1.74 1.76
5 88_gemm_groupnorm_swish_multiply_swish_reduction_opt_base 0.03 1.74 1.76
5 88_gemm_groupnorm_swish_multiply_swish_uniform_control_base 0.03 1.74 1.76
5 88_gemm_groupnorm_swish_multiply_swish_ldg_align_base 0.03 1.74 1.76
16 88_Gemm_GroupNorm_Swish_Multiply_Swish 0.03 1.68 1.69
16 optimized_kernel_base 0.03 1.68 1.69
16 88_gemm_groupnorm_swish_multiply_swish_atomic_minimal_base 0.03 1.68 1.69
16 grid2d_warpreduce_base 0.03 1.68 1.69
16 88_gemm_groupnorm_swish_minimal_sync_base 0.03 1.68 1.69 
#include <torch/extension.h>
#include <ATen/ATen.h>
#include <vector>

#define CHECK_CUDA(x) TORCH_CHECK(x.is_cuda(), #x " must be a CUDA tensor")
#define CHECK_CONTIGUOUS(x) TORCH_CHECK(x.is_contiguous(), #x " must be contiguous")
#define CHECK_INPUT(x) \
    CHECK_CUDA(x); \
    CHECK_CONTIGUOUS(x)

template <typename scalar_t>
__forceinline__ __device__ 
scalar_t warpReduceSum(scalar_t val) {
    #pragma unroll
    for (int offset = 16; offset > 0; offset /= 2) {
        val += __shfl_down_sync(0xffffffff, val, offset);
    }
    return val;
}

template <typename scalar_t>
__forceinline__ __device__
scalar_t blockReduceSum(scalar_t val) {
    static __shared__ scalar_t shared[32];
    const int lane = threadIdx.x % warpSize;
    const int wid = threadIdx.x / warpSize;

    val = warpReduceSum(val);

    if (lane == 0) shared[wid] = val;
    __syncthreads();

    val = (threadIdx.x < blockDim.x / warpSize) ? shared[lane] : 0;
    
    if (wid == 0) val = warpReduceSum(val);
    return val;
}

// Kernel with optimized reduction using loop unrolling
template<typename scalar_t>
__global__ void unrolled_groupnorm_kernel(
    const scalar_t* __restrict__ x,
    scalar_t* __restrict__ output,
    const scalar_t* __restrict__ group_norm_weight,
    const scalar_t* __restrict__ group_norm_bias,
    const scalar_t* __restrict__ multiply_weight,
    const int C,
    const int channels_per_group
) {
    const int n = blockIdx.x;
    const int g = blockIdx.y;
    const int tid = threadIdx.x;
    
    __shared__ scalar_t mean_shared, inv_std_shared;
    
    scalar_t sum = 0, sumsq = 0;
    
    #pragma unroll 8
    for (int c = tid; c < channels_per_group; c += blockDim.x) {
        const int channel_idx = g * channels_per_group + c;
        const int idx = n * C + channel_idx;
        const scalar_t val = x[idx];
        sum += val;
        sumsq += val * val;
    }
    
    sum = blockReduceSum(sum);
    sumsq = blockReduceSum(sumsq);
    
    if (tid == 0) {
        const scalar_t mean = sum / channels_per_group;
        const scalar_t var = sumsq / channels_per_group - mean * mean;
        mean_shared = mean;
        inv_std_shared = rsqrtf(var + static_cast<scalar_t>(1e-5));
    }
    __syncthreads();
    
    const scalar_t mean = mean_shared;
    const scalar_t inv_std = inv_std_shared;
    
    #pragma unroll 8
    for (int c = tid; c < channels_per_group; c += blockDim.x) {
        const int channel_idx = g * channels_per_group + c;
        const int idx = n * C + channel_idx;
        
        const scalar_t x_val = x[idx];
        const scalar_t gamma = group_norm_weight[channel_idx];
        const scalar_t beta = group_norm_bias[channel_idx];
        const scalar_t w = multiply_weight[channel_idx];
        
        scalar_t y = (x_val - mean) * inv_std * gamma + beta;
        
        const scalar_t sigmoid1 = 1.0f / (1.0f + __expf(-y));
        y *= sigmoid1;
        
        y *= w;
        
        const scalar_t sigmoid2 = 1.0f / (1.0f + __expf(-y));
        y *= sigmoid2;
        
        output[idx] = y;
    }
}

torch::Tensor fused_forward(
    torch::Tensor x,
    torch::Tensor gemm_weight,
    torch::Tensor gemm_bias,
    torch::Tensor group_norm_weight,
    torch::Tensor group_norm_bias,
    torch::Tensor multiply_weight,
    int64_t num_groups
) {
    CHECK_INPUT(x);
    CHECK_INPUT(gemm_weight);
    CHECK_INPUT(gemm_bias);
    CHECK_INPUT(group_norm_weight);
    CHECK_INPUT(group_norm_bias);
    CHECK_INPUT(multiply_weight);
    
    torch::Tensor x_linear = torch::addmm(gemm_bias, x, gemm_weight.t());
    
    auto N = x_linear.size(0);
    auto C = x_linear.size(1);
    auto output = torch::empty_like(x_linear);
    int channels_per_group = C / num_groups;
    
    dim3 blocks(N, num_groups);
    const int threads = std::min(256, channels_per_group);
    
    AT_DISPATCH_FLOATING_TYPES(x_linear.scalar_type(), "unrolled_groupnorm_forward", ([&] {
        unrolled_groupnorm_kernel<scalar_t><<<blocks, threads>>>(
            x_linear.data_ptr<scalar_t>(),
            output.data_ptr<scalar_t>(),
            group_norm_weight.data_ptr<scalar_t>(),
            group_norm_bias.data_ptr<scalar_t>(),
            multiply_weight.data_ptr<scalar_t>(),
            C,
            channels_per_group
        );
    }));
    
    return output;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &fused_forward, "Fused GEMM, GroupNorm and Swish forward pass with unrolling");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 1.472 inst/cycle 0.000 5
Executed Ipc Elapsed 0.628 inst/cycle 0.000 5
Issue Slots Busy 38.132 % 0.016 5
Issued Ipc Active 1.522 inst/cycle 0.000 5
SM Busy 38.132 % 0.016 5
Memory Throughput 103329995748.476 byte/second 3309606403928250880.000 5
Mem Busy 12.154 % 0.049 5
Max Bandwidth 10.734 % 0.037 5
L1/TEX Hit Rate 18.520 % 0.000 5
L2 Hit Rate 78.684 % 0.273 5
Mem Pipes Busy 13.526 % 0.057 5
Warp Cycles Per Issued Instruction 17.444 cycle 0.068 5
Warp Cycles Per Executed Instruction 18.038 cycle 0.074 5
Avg. Active Threads Per Warp 30.720 0.000 5
Avg. Not Predicated Off Threads Per Warp 28.670 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 32.000 block 0.000 5
Block Limit Shared Mem 51.000 block 0.000 5
Block Limit Warps 32.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 41.764 % 0.227 5
Achieved Active Warps Per SM 26.732 warp 0.092 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (41.5%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 314949.93 μs
Device Time 185.50 μs
Self CPU Time 66.02 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 314883.92 μs
Device Time 185.50 μs
Self CPU Time 115.14 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 316845.44 μs
Device Time 0.00 μs
Self CPU Time 2734.14 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 313648.83 μs
Device Time 0.00 μs
Self CPU Time 313648.83 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 52081.92 μs
Device Time 85734.57 μs
Self CPU Time 2438.09 μs
Self Device Time 85734.57 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 53795.94 μs
Device Time 85734.57 μs
Self CPU Time 1738.68 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::addmm
CPU Time 136632.57 μs
Device Time 20810.24 μs
Self CPU Time 36445.34 μs
Self Device Time 20810.24 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
sm80_xmma_gemm_f32f32_f32f32_f32_tn_n_tilesize32x32x8_stage3_warpsize1x2x1_ffma_aligna4_alignc4_execute_kernel__51_cublas
CPU Time 0.00 μs
Device Time 20810.24 μs
Self CPU Time 0.00 μs
Self Device Time 20810.24 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 85734.57 μs
Self CPU Time 0.00 μs
Self Device Time 85734.57 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed 
45300 warnings generated when compiling for host.
Suppressed 45329 warnings (45282 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:5:35 bugprone-macro-parentheses
5 | #define CHECK_CUDA(x) TORCH_CHECK(x.is_cuda(), #x " must be a CUDA tensor")
| ^
| ()
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:6:41: warning: macro argument should be enclosed in parentheses [bugprone-macro-parentheses]
6 | #define CHECK_CONTIGUOUS(x) TORCH_CHECK(x.is_contiguous(), #x " must be contiguous")
| ^
| ()
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:25:22: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
25 | const int lane = threadIdx.x % warpSize;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:26:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
26 | const int wid = threadIdx.x / warpSize;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:44:5: warning: 3 adjacent parameters of 'unrolled_groupnorm_kernel' of similar type ('const scalar_t *__restrict') are easily swapped by mistake [bugprone-easily-swappable-parameters]
44 | const scalar_t* __restrict__ group_norm_weight,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
45 | const scalar_t* __restrict__ group_norm_bias,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
46 | const scalar_t* __restrict__ multiply_weight,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:44:34: note: the first parameter in the range is 'group_norm_weight'
44 | const scalar_t* __restrict__ group_norm_weight,
| ^~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:46:34: note: the last parameter in the range is 'multiply_weight'
46 | const scalar_t* __restrict__ multiply_weight,
| ^~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:47:5: warning: 2 adjacent parameters of 'unrolled_groupnorm_kernel' of similar type ('const int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
47 | const int C,
| ^~~~~~~~~~~~
48 | const int channels_per_group
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:47:15: note: the first parameter in the range is 'C'
47 | const int C,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:48:15: note: the last parameter in the range is 'channels_per_group'
48 | const int channels_per_group
| ^~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:50:19: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
50 | const int n = blockIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:51:19: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
51 | const int g = blockIdx.y;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:52:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
52 | const int tid = threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:59:52: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
59 | for (int c = tid; c < channels_per_group; c += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:82:52: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
82 | for (int c = tid; c < channels_per_group; c += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:106:19: warning: the parameter 'x' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
106 | torch::Tensor x,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:107:19: warning: the parameter 'gemm_weight' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
107 | torch::Tensor gemm_weight,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:108:19: warning: the parameter 'gemm_bias' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
108 | torch::Tensor gemm_bias,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:126:30: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
126 | int channels_per_group = C / num_groups;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_88/b9_s0_unrolled_groupnorm_kernel/base/base.cu:131:5: warning: inside a lambda, '__func__' expands to the name of the function call operator; consider capturing the name of the enclosing function explicitly [bugprone-lambda-function-name]
131 | AT_DISPATCH_FLOATING_TYPES(x_linear.scalar_type(), "unrolled_groupnorm_forward", ([&] {
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:237:34: note: expanded from macro 'AT_DISPATCH_FLOATING_TYPES'
237 | AT_DISPATCH_SWITCH(TYPE, NAME, AT_DISPATCH_CASE_FLOATING_TYPES(__VA_ARGS__))
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:233:3: note: expanded from macro 'AT_DISPATCH_CASE_FLOATING_TYPES'
233 | AT_DISPATCH_CASE(at::ScalarType::Double, __VA_ARGS__) \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:74:3: note: expanded from macro 'AT_DISPATCH_CASE'
74 | AT_PRIVATE_CASE_TYPE_USING_HINT(enum_type, scalar_t, __VA_ARGS__)
| ^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:58:7: note: expanded from macro 'AT_PRIVATE_CHECK_SELECTIVE_BUILD'
58 | AT_ERROR( \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:711:32: note: expanded from macro 'AT_ERROR'
711 | C10_EXPAND_MSVC_WORKAROUND(TORCH_CHECK(false, ::c10::str(__VA_ARGS__))); \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:536:9: note: expanded from macro 'TORCH_CHECK'
536 | __func__, \
| ^