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99_Matmul_GELU_Softmaxwarp_reduced_fused_kernel_base

Level 2 • Task 99
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    weight: torch.Tensor,
    bias: torch.Tensor,
) -> torch.Tensor:
    """
    Applies linear transformation, GELU activation, and softmax.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_features)
        weight (torch.Tensor): Weight matrix of shape (out_features, in_features)
        bias (torch.Tensor): Bias vector of shape (out_features)

    Returns:
        torch.Tensor: Output tensor after applying linear, GELU and softmax,
            with shape (batch_size, out_features)
    """
    x = F.linear(x, weight, bias)
    x = F.gelu(x)
    x = F.softmax(x, dim=1)
    return x


class Model(nn.Module):
    """
    Simple model that performs a matrix multiplication, applies GELU, and then applies Softmax.
    """

    def __init__(self, in_features, out_features):
        super(Model, self).__init__()
        gemm = nn.Linear(in_features, out_features)
        self.weight = gemm.weight
        self.bias = gemm.bias

    def forward(self, x, fn=module_fn):
        return fn(x, self.weight, self.bias)


batch_size = 128
in_features = 100
out_features = 10


def get_inputs():
    return [torch.randn(batch_size, in_features)]


def get_init_inputs():
    return [in_features, out_features]
import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Simple model that performs a matrix multiplication, applies GELU, and then applies Softmax.
    """
    def __init__(self, in_features, out_features):
        super(Model, self).__init__()
        self.linear = nn.Linear(in_features, out_features)

    def forward(self, x):
        x = self.linear(x)
        x = torch.nn.functional.gelu(x)
        x = torch.nn.functional.softmax(x, dim=1)
        return x

batch_size = 128
in_features = 100
out_features = 10

def get_inputs():
    return [torch.randn(batch_size, in_features)]

def get_init_inputs():
    return [in_features, out_features]

Kernel Information

Related Kernels (Level 2, Task 99 • 99_Matmul_GELU_Softmax)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 fused_opt_base 0.01 2.78 2.26
🥇 warp_divergence_minimized_kernel_base 0.01 2.78 2.26
🥇 block_size_experiment_fused_kernel_base 0.01 2.78 2.26
🥇 optimized_fused_kernel_base 0.01 2.78 2.26
🥇 fused_shared_mem_kernel_base 0.01 2.78 2.26
🥇 balanced_workload_fused_kernel_base 0.01 2.78 2.26
7 reduced_sync_matmul_gelu_softmax_base 0.01 2.53 2.06
7 aligned_ldg_fused_kernel_base_base 0.01 2.53 2.06
7 warp_optimized_fused_kernel_base_base 0.01 2.53 2.06
7 fused_ldg_vec_kernel_base 0.01 2.53 2.06
7 unrolled_fused_matmul_gelu_softmax_base_base 0.01 2.53 2.06
7 fused_optim_base 0.01 2.53 2.06
7 fused_linear_gelu_softmax_optimized_base 0.01 2.53 2.06
7 warp_reduced_fused_kernel_base 0.01 2.53 2.06
7 fused_nodivergence_kernel_base 0.01 2.53 2.06
7 modular_device_functions_base 0.01 2.53 2.06
7 optimized_linear_gelu_softmax_base 0.01 2.53 2.06
7 optimized_linear_gelu_softmax_edit_1 0.01 2.53 2.06
7 optimized_linear_gelu_softmax_base 0.01 2.53 2.06
7 optimized_linear_gelu_softmax_edit_1 0.01 2.53 2.06
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <math.h>
#include <float.h>

// GELU activation function (approximation)
__device__ float gelu(float x) {
    const float sqrt_2_over_pi = 0.7978845608028654f;
    const float coef = 0.044715f;
    float cdf = 0.5f * (1.0f + tanhf(sqrt_2_over_pi * x * (1.0f + coef * x * x)));
    return x * cdf;
}

// Warp-level reduction to compute maximum using __shfl_down_sync
__inline__ __device__ float warpReduceMax(float val) {
    for (int offset = warpSize / 2; offset > 0; offset /= 2) {
        val = max(val, __shfl_down_sync(0xffffffff, val, offset));
    }
    return val;
}

// Warp-level reduction to compute sum using __shfl_down_sync
__inline__ __device__ float warpReduceSum(float val) {
    for (int offset = warpSize / 2; offset > 0; offset /= 2) {
        val += __shfl_down_sync(0xffffffff, val, offset);
    }
    return val;
}

// Fused kernel that computes linear transformation, applies GELU activation, and then softmax
// Reduction steps for softmax (max and sum) are optimized with shared memory and warp-level primitives
__global__ void warp_reduced_fused_kernel(
    const float* __restrict__ x,
    const float* __restrict__ weight,
    const float* __restrict__ bias,
    float* output,
    const int batch_size,
    const int in_features,
    const int out_features
) {
    int row = blockIdx.x;  // one block per row
    int tid = threadIdx.x; // each thread computes one output element

    if (row >= batch_size) return;

    // Each thread computes the dot product for its output feature if within range
    float result = 0.0f;
    if (tid < out_features) {
        for (int k = 0; k < in_features; k++) {
            result += x[row * in_features + k] * weight[tid * in_features + k];
        }
        result += bias[tid];
        result = gelu(result);
    }

    // Begin softmax reduction
    // Step 1: Compute the maximum value across the row
    float val = (tid < out_features) ? result : -FLT_MAX;
    float max_val = warpReduceMax(val);

    // Use shared memory to store warp-level maxima
    __shared__ float smax[32];  // supports up to 32 warps per block (1024 threads/block)
    int lane = tid & (warpSize - 1);
    int warpId = tid / warpSize;
    if (lane == 0) {
        smax[warpId] = max_val;
    }
    __syncthreads();

    // First warp reduces the warp maxima
    if (tid < warpSize) {
        // Only threads corresponding to the number of warps participate
        int numWarps = (blockDim.x + warpSize - 1) / warpSize;
        float tmp = (tid < numWarps) ? smax[tid] : -FLT_MAX;
        tmp = warpReduceMax(tmp);
        smax[tid] = tmp;
    }
    __syncthreads();

    float block_max = smax[0];

    // Step 2: Compute exponentials using the stable value
    float exp_val = (tid < out_features) ? expf(result - block_max) : 0.0f;

    // Reduce the sum of exponentials using warp-level primitives
    float sum_val = warpReduceSum(exp_val);
    __shared__ float ssum[32];
    if (lane == 0) {
        ssum[warpId] = sum_val;
    }
    __syncthreads();

    if (tid < warpSize) {
        int numWarps = (blockDim.x + warpSize - 1) / warpSize;
        float tmp = (tid < numWarps) ? ssum[tid] : 0.0f;
        tmp = warpReduceSum(tmp);
        ssum[tid] = tmp;
    }
    __syncthreads();

    float block_sum = ssum[0];

    // Step 3: Normalize to complete softmax
    if (tid < out_features) {
        output[row * out_features + tid] = exp_val / block_sum;
    }
}

// Forward function wrapping the kernel launch
torch::Tensor forward(
    torch::Tensor x,
    torch::Tensor weight,
    torch::Tensor bias
) {
    const int batch_size = x.size(0);
    const int in_features = x.size(1);
    const int out_features = weight.size(0);

    auto options = torch::TensorOptions().dtype(x.dtype()).device(x.device());
    auto output = torch::empty({batch_size, out_features}, options);

    // Launch one block per row with out_features threads per block
    dim3 blocks(batch_size);
    dim3 threads(out_features);

    warp_reduced_fused_kernel<<<blocks, threads>>>(
        x.data_ptr<float>(),
        weight.data_ptr<float>(),
        bias.data_ptr<float>(),
        output.data_ptr<float>(),
        batch_size,
        in_features,
        out_features
    );

    return output;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &forward, "Fused Linear + GELU + Softmax with warp-level reductions");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.060 inst/cycle 0.000 5
Executed Ipc Elapsed 0.048 inst/cycle 0.000 5
Issue Slots Busy 1.518 % 0.002 5
Issued Ipc Active 0.060 inst/cycle 0.000 5
SM Busy 1.518 % 0.002 5
Memory Throughput 7661218956.824 byte/second 4168543445538053120.000 5
Mem Busy 3.892 % 0.010 5
Max Bandwidth 3.122 % 0.006 5
L1/TEX Hit Rate 87.140 % 0.000 5
L2 Hit Rate 100.918 % 2.106 5
Mem Pipes Busy 1.482 % 0.001 5
Warp Cycles Per Issued Instruction 16.446 cycle 0.063 5
Warp Cycles Per Executed Instruction 16.514 cycle 0.065 5
Avg. Active Threads Per Warp 9.740 0.000 5
Avg. Not Predicated Off Threads Per Warp 9.210 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 64.000 block 0.000 5
Block Limit Shared Mem 51.000 block 0.000 5
Block Limit Warps 64.000 block 0.000 5
Theoretical Active Warps per SM 32.000 warp 0.000 5
Theoretical Occupancy 50.000 % 0.000 5
Achieved Occupancy 1.560 % 0.000 5
Achieved Active Warps Per SM 1.000 warp 0.000 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN ThreadDivergence Instructions are executed in warps, which are groups of 32 threads. Optimal instruction throughput is achieved if all 32 threads of a warp execute the same instruction. The chosen launch configuration, early thread completion, and divergent flow control can significantly lower the number of active threads in a warp per cycle. This kernel achieves an average of 9.7 threads being active per cycle. This is further reduced to 9.2 threads per warp due to predication. The compiler may use predication to avoid an actual branch. Instead, all instructions are scheduled, but a per-thread condition code or predicate controls which threads execute the instructions. Try to avoid different execution paths within a warp when possible. In addition, ensure your kernel makes use of Independent Thread Scheduling, which allows a warp to reconverge after a data-dependent conditional block by explicitly calling __syncwarp().
WRN Occupancy This kernel's theoretical occupancy (50.0%) is limited by the number of blocks that can fit on the SM. The difference between calculated theoretical (50.0%) and measured achieved occupancy (1.6%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 400104.51 μs
Device Time 9.25 μs
Self CPU Time 60.61 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 400043.90 μs
Device Time 9.25 μs
Self CPU Time 119.37 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 399769.06 μs
Device Time 0.00 μs
Self CPU Time 108.16 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 399465.33 μs
Device Time 0.00 μs
Self CPU Time 399465.33 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 399762.54 μs
Device Time 16124.25 μs
Self CPU Time 399762.54 μs
Self Device Time 16124.25 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
warp_reduced_fused_kernel(float const*, float const*, float const*, float*, int, int, int)
CPU Time 0.00 μs
Device Time 53191.34 μs
Self CPU Time 0.00 μs
Self Device Time 53191.34 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaEventRecord
CPU Time 13646.92 μs
Device Time 31854.18 μs
Self CPU Time 13646.92 μs
Self Device Time 31854.18 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 52198.69 μs
Device Time 480978.39 μs
Self CPU Time 10231.19 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 41971.27 μs
Device Time 480978.39 μs
Self CPU Time 12303.40 μs
Self Device Time 480978.39 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 480978.39 μs
Self CPU Time 0.00 μs
Self Device Time 480978.39 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed
45288 warnings generated when compiling for host.
Suppressed 45323 warnings (45276 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:35:5 bugprone-easily-swappable-parameters
35 | const float* __restrict__ weight,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
36 | const float* __restrict__ bias,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:35:31: note: the first parameter in the range is 'weight'
35 | const float* __restrict__ weight,
| ^~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:36:31: note: the last parameter in the range is 'bias'
36 | const float* __restrict__ bias,
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:38:5: warning: 3 adjacent parameters of 'warp_reduced_fused_kernel' of similar type ('const int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
38 | const int batch_size,
| ^~~~~~~~~~~~~~~~~~~~~
39 | const int in_features,
| ~~~~~~~~~~~~~~~~~~~~~~
40 | const int out_features
| ~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:38:15: note: the first parameter in the range is 'batch_size'
38 | const int batch_size,
| ^~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:40:15: note: the last parameter in the range is 'out_features'
40 | const int out_features
| ^~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:42:15: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
42 | int row = blockIdx.x; // one block per row
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:43:15: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
43 | int tid = threadIdx.x; // each thread computes one output element
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:74:24: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
74 | int numWarps = (blockDim.x + warpSize - 1) / warpSize;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:95:24: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
95 | int numWarps = (blockDim.x + warpSize - 1) / warpSize;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:112:19: warning: the parameter 'x' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
112 | torch::Tensor x,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:113:19: warning: the parameter 'weight' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
113 | torch::Tensor weight,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:114:19: warning: the parameter 'bias' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
114 | torch::Tensor bias
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:116:28: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
116 | const int batch_size = x.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:117:29: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
117 | const int in_features = x.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_99/b3_s0_warp_reduced_fused_kernel/base/base.cu:118:30: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
118 | const int out_features = weight.size(0);
| ^