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2_ShallowWideMLP • warp_shfl_optimized_base

Level 3 • Task 2
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor, weights: nn.ParameterList, biases: nn.ParameterList
) -> torch.Tensor:
    """
    Implements a shallow wide multi-layer perceptron with ReLU activation.

    Args:
        x (torch.Tensor): The input tensor, shape (batch_size, input_size)
        weights (nn.ParameterList): A list of weight tensors for each linear layer
        biases (nn.ParameterList): A list of bias tensors for each linear layer

    Returns:
        torch.Tensor: The output tensor, shape (batch_size, output_size)
    """
    for weight, bias in zip(weights[:-1], biases[:-1]):
        x = F.linear(x, weight, bias)
        x = F.relu(x)
    x = F.linear(x, weights[-1], biases[-1])
    return x


class Model(nn.Module):
    def __init__(self, input_size, hidden_layer_sizes, output_size):
        """
        :param input_size: The number of input features
        :param hidden_layer_sizes: A list of ints containing the sizes of each hidden layer
        :param output_size: The number of output features
        """
        super(Model, self).__init__()

        self.weights = nn.ParameterList()
        self.biases = nn.ParameterList()

        current_input_size = input_size
        for hidden_size in hidden_layer_sizes:
            linear = nn.Linear(current_input_size, hidden_size)
            self.weights.append(nn.Parameter(linear.weight.data.clone()))
            self.biases.append(nn.Parameter(linear.bias.data.clone()))
            current_input_size = hidden_size

        linear = nn.Linear(current_input_size, output_size)
        self.weights.append(nn.Parameter(linear.weight.data.clone()))
        self.biases.append(nn.Parameter(linear.bias.data.clone()))

    def forward(self, x, fn=module_fn):
        return fn(x, self.weights, self.biases)


# Test code
batch_size = 1
input_size = 1000
hidden_layer_sizes = [2000, 2000]  # Example of deep and narrow layers
output_size = 10


def get_inputs():
    return [torch.randn(batch_size, input_size)]


def get_init_inputs():
    return [input_size, hidden_layer_sizes, output_size]

import torch
import torch.nn as nn
import torch.nn.functional as F

class Model(nn.Module):
    def __init__(self, input_size, hidden_layer_sizes, output_size):
        """
        :param input_size: The number of input features
        :param hidden_layer_sizes: A list of ints containing the sizes of each hidden layer
        :param output_size: The number of output features
        """
        super(Model, self).__init__()
        
        layers = []
        current_input_size = input_size
        
        for hidden_size in hidden_layer_sizes:
            layers.append(nn.Linear(current_input_size, hidden_size))
            layers.append(nn.ReLU())
            current_input_size = hidden_size
        
        layers.append(nn.Linear(current_input_size, output_size))
        
        self.network = nn.Sequential(*layers)
    
    def forward(self, x):
        """
        :param x: The input tensor, shape (batch_size, input_size)
        :return: The output tensor, shape (batch_size, output_size)
        """
        return self.network(x)

# Test code
batch_size = 1
input_size = 1000
hidden_layer_sizes = [2000, 2000]  # Example of deep and narrow layers
output_size = 10

def get_inputs():
    return [torch.randn(batch_size, input_size)]

def get_init_inputs():
    return [input_size, hidden_layer_sizes, output_size]
Download Evaluation Download PyTorch Download CUDA Download Profiles

Kernel Information

Operation Name 2_ShallowWideMLP
Level ID 3
Task ID 2
Kernel Name warp_shfl_optimized_base
CUDA Speedup (Native) 2.185x
CUDA Speedup (Compile) 4.149x
CUDA Runtime 0.042 ms
PyTorch Runtime (Native) 0.092 ms
PyTorch Runtime (Compile) 0.174 ms
Correct True
Max Diff (vs. Reference) 0.000000
Model o3-mini-2025-01-31
Temperature 1.00
View Experiment Progress Details

Related Kernels (Level 3, Task 2 • 2_ShallowWideMLP)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 min_sync_warp_base 0.04 2.29 4.36
🥈 optimized_reduction_warp_v2_base 0.04 2.24 4.25
🥈 efficient_mlp_forward_kernel_base 0.04 2.24 4.25
4 warp_index_optimized_base 0.04 2.18 4.15
4 warp_shfl_optimized_base 0.04 2.18 4.15
4 stride_loop_optimization_base 0.04 2.18 4.15
4 warp_dot_base 0.04 2.18 4.15
4 coalesced_vectorized_base 0.04 2.18 4.15
4 tiled_warp_forward_base 0.04 2.18 4.15
4 uniform_control_flow_base_base 0.04 2.18 4.15
4 warp_dot_optimized_block_base 0.04 2.18 4.15
4 tuned_block_size_reduction_v2_base 0.04 2.18 4.15
4 tuned_block_size_reduction_v2_edit_1 0.04 2.18 4.15
14 warp_uniform_control_flow_base 0.04 2.13 4.05
15 block_reduce_mlp_2d_base 0.04 2.09 3.96
16 warp_coalesced_optimized_block_base 0.05 1.99 3.79
17 reduced_shared_warp_edit_1 0.05 1.91 3.63
18 reduced_shared_warp_base 0.05 1.87 3.56
19 hybrid_mlp_forward_base 0.06 1.61 3.06
19 hybrid_mlp_forward_base 0.06 1.61 3.06 
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>

// Define the number of threads per block; must be a multiple of 32.
#define THREADS_PER_BLOCK 128

// This kernel replaces any shared memory reductions with warp-level __shfl_down_sync primitives.
// Each block handles one batch row, and each warp within the block computes one output neuron's dot product.

template <typename scalar_t>
__global__ void mlp_forward_kernel_warp_shfl(
    const scalar_t* __restrict__ input,
    const scalar_t* __restrict__ weight,
    const scalar_t* __restrict__ bias,
    scalar_t* __restrict__ output,
    int batch_size,
    int in_features,
    int out_features) {

    // Each block processes one row of the batch
    int batch_row = blockIdx.x;
    
    // Each warp (of 32 threads) calculates one output neuron.
    int warp_id = threadIdx.x / 32;  // warp index within the block
    int lane = threadIdx.x % 32;       // lane index within the warp

    // Determine the neuron index computed by this warp across the output
    int neurons_per_block = blockDim.x / 32;
    int neuron = blockIdx.y * neurons_per_block + warp_id;

    if (batch_row >= batch_size || neuron >= out_features) return;

    scalar_t sum = 0;
    // Each thread processes elements in a strided loop over in_features
    for (int i = lane; i < in_features; i += 32) {
        sum += input[batch_row * in_features + i] * weight[neuron * in_features + i];
    }

    // Use warp-level reduction to sum across lanes (no shared memory required)
    for (int offset = 16; offset > 0; offset /= 2) {
        sum += __shfl_down_sync(0xffffffff, sum, offset);
    }

    // The first lane writes the result, adding the bias
    if (lane == 0) {
        output[batch_row * out_features + neuron] = sum + bias[neuron];
    }
}

// Optimized ReLU activation kernel using a stride loop to cover all elements
template <typename scalar_t>
__global__ void relu_kernel_shfl(
    scalar_t* __restrict__ data,
    int size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    int stride = blockDim.x * gridDim.x;
    for (int i = idx; i < size; i += stride) {
        data[i] = data[i] > 0 ? data[i] : static_cast<scalar_t>(0);
    }
}

// Main MLP forward pass function that applies the kernel layer by layer.
// This implementation uses warp-level primitives exclusively for reduction, eliminating shared memory usage.

torch::Tensor mlp_cuda_forward(
    torch::Tensor input,
    std::vector<torch::Tensor> weights,
    std::vector<torch::Tensor> biases) {

    auto device = input.device();
    int num_layers = weights.size();
    torch::Tensor current = input;

    for (int layer = 0; layer < num_layers; layer++) {
        int batch_size = current.size(0);
        int in_features = current.size(1);
        int out_features = weights[layer].size(0);

        auto output = torch::empty({batch_size, out_features},
                                   torch::dtype(current.dtype()).device(device));

        // Configure the grid: one block per batch row and groups of warps for output neurons.
        dim3 block(THREADS_PER_BLOCK);
        int neurons_per_block = THREADS_PER_BLOCK / 32; // one warp per neuron
        dim3 grid(batch_size, (out_features + neurons_per_block - 1) / neurons_per_block);

        AT_DISPATCH_FLOATING_TYPES(current.scalar_type(), "mlp_forward_kernel_warp_shfl", ([&] {
            mlp_forward_kernel_warp_shfl<scalar_t><<<grid, block>>>(
                current.data_ptr<scalar_t>(),
                weights[layer].data_ptr<scalar_t>(),
                biases[layer].data_ptr<scalar_t>(),
                output.data_ptr<scalar_t>(),
                batch_size,
                in_features,
                out_features
            );
        }));

        // Apply ReLU activation for non-final layers
        if (layer < num_layers - 1) {
            int size = batch_size * out_features;
            int threads_per_block_relu = 256;
            int num_blocks_relu = (size + threads_per_block_relu - 1) / threads_per_block_relu;
            AT_DISPATCH_FLOATING_TYPES(output.scalar_type(), "relu_kernel_shfl", ([&] {
                relu_kernel_shfl<scalar_t><<<num_blocks_relu, threads_per_block_relu>>>(
                    output.data_ptr<scalar_t>(),
                    size
                );
            }));
        }
        
        current = output;
    }

    return current;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &mlp_cuda_forward, "MLP forward (CUDA warp shfl optimized)");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.232 inst/cycle 0.000 5
Executed Ipc Elapsed 0.000 inst/cycle 0.000 5
Issue Slots Busy 6.476 % 0.033 5
Issued Ipc Active 0.260 inst/cycle 0.000 5
SM Busy 6.476 % 0.033 5
Memory Throughput 3509889731.830 byte/second 8720875385590496.000 5
Mem Busy 9.920 % 0.054 5
Max Bandwidth 5.118 % 0.014 5
L1/TEX Hit Rate 50.000 % 0.000 5
L2 Hit Rate 100.820 % 0.020 5
Mem Pipes Busy 0.134 % 0.000 5
Warp Cycles Per Issued Instruction 31.822 cycle 5.940 5
Warp Cycles Per Executed Instruction 35.690 cycle 7.471 5
Avg. Active Threads Per Warp 31.800 0.000 5
Avg. Not Predicated Off Threads Per Warp 27.370 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 10.000 block 0.000 5
Block Limit Shared Mem 32.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 12.152 % 0.000 5
Achieved Active Warps Per SM 7.776 warp 0.000 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (12.2%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 279615.55 μs
Device Time 6844.96 μs
Self CPU Time 78.75 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 279536.79 μs
Device Time 6844.96 μs
Self CPU Time 165.24 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 272036.08 μs
Device Time 0.00 μs
Self CPU Time 226.39 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 270612.97 μs
Device Time 0.00 μs
Self CPU Time 270612.97 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 515433.71 μs
Device Time 56081.50 μs
Self CPU Time 515433.71 μs
Self Device Time 56081.50 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void mlp_forward_kernel_warp_shfl<float>(float const*, float const*, float const*, float*, int, int, int)
CPU Time 0.00 μs
Device Time 197888.19 μs
Self CPU Time 0.00 μs
Self Device Time 197888.19 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 57989.86 μs
Device Time 483203.51 μs
Self CPU Time 11231.50 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 46760.13 μs
Device Time 483203.51 μs
Self CPU Time 15400.95 μs
Self Device Time 483203.51 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 483203.51 μs
Self CPU Time 0.00 μs
Self Device Time 483203.51 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed 
45296 warnings generated when compiling for host.
Suppressed 45323 warnings (45276 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:14:5 bugprone-easily-swappable-parameters
14 | const scalar_t* __restrict__ weight,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
15 | const scalar_t* __restrict__ bias,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:14:34: note: the first parameter in the range is 'weight'
14 | const scalar_t* __restrict__ weight,
| ^~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:15:34: note: the last parameter in the range is 'bias'
15 | const scalar_t* __restrict__ bias,
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:17:5: warning: 2 adjacent parameters of 'mlp_forward_kernel_warp_shfl' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
17 | int batch_size,
| ^~~~~~~~~~~~~~~
18 | int in_features,
| ~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:17:9: note: the first parameter in the range is 'batch_size'
17 | int batch_size,
| ^~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:18:9: note: the last parameter in the range is 'in_features'
18 | int in_features,
| ^~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:22:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
22 | int batch_row = blockIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:25:19: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
25 | int warp_id = threadIdx.x / 32; // warp index within the block
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:26:16: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
26 | int lane = threadIdx.x % 32; // lane index within the warp
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:29:29: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
29 | int neurons_per_block = blockDim.x / 32;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:30:18: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
30 | int neuron = blockIdx.y * neurons_per_block + warp_id;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:56:15: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
56 | int idx = blockIdx.x * blockDim.x + threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:57:18: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
57 | int stride = blockDim.x * gridDim.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:67:19: warning: the parameter 'input' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
67 | torch::Tensor input,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:72:22: warning: narrowing conversion from 'size_type' (aka 'unsigned long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
72 | int num_layers = weights.size();
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:76:26: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
76 | int batch_size = current.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:77:27: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
77 | int in_features = current.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:78:28: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
78 | int out_features = weights[layer].size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:88:9: warning: inside a lambda, '__func__' expands to the name of the function call operator; consider capturing the name of the enclosing function explicitly [bugprone-lambda-function-name]
88 | AT_DISPATCH_FLOATING_TYPES(current.scalar_type(), "mlp_forward_kernel_warp_shfl", ([&] {
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:237:34: note: expanded from macro 'AT_DISPATCH_FLOATING_TYPES'
237 | AT_DISPATCH_SWITCH(TYPE, NAME, AT_DISPATCH_CASE_FLOATING_TYPES(__VA_ARGS__))
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:233:3: note: expanded from macro 'AT_DISPATCH_CASE_FLOATING_TYPES'
233 | AT_DISPATCH_CASE(at::ScalarType::Double, __VA_ARGS__) \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:74:3: note: expanded from macro 'AT_DISPATCH_CASE'
74 | AT_PRIVATE_CASE_TYPE_USING_HINT(enum_type, scalar_t, __VA_ARGS__)
| ^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:58:7: note: expanded from macro 'AT_PRIVATE_CHECK_SELECTIVE_BUILD'
58 | AT_ERROR( \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:711:32: note: expanded from macro 'AT_ERROR'
711 | C10_EXPAND_MSVC_WORKAROUND(TORCH_CHECK(false, ::c10::str(__VA_ARGS__))); \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:536:9: note: expanded from macro 'TORCH_CHECK'
536 | __func__, \
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_3/task_2/b6_s3_warp_shfl_optimized/base/base.cu:105:13: warning: inside a lambda, '__func__' expands to the name of the function call operator; consider capturing the name of the enclosing function explicitly [bugprone-lambda-function-name]
105 | AT_DISPATCH_FLOATING_TYPES(output.scalar_type(), "relu_kernel_shfl", ([&] {
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:237:34: note: expanded from macro 'AT_DISPATCH_FLOATING_TYPES'
237 | AT_DISPATCH_SWITCH(TYPE, NAME, AT_DISPATCH_CASE_FLOATING_TYPES(__VA_ARGS__))
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:233:3: note: expanded from macro 'AT_DISPATCH_CASE_FLOATING_TYPES'
233 | AT_DISPATCH_CASE(at::ScalarType::Double, __VA_ARGS__) \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:74:3: note: expanded from macro 'AT_DISPATCH_CASE'
74 | AT_PRIVATE_CASE_TYPE_USING_HINT(enum_type, scalar_t, __VA_ARGS__)
| ^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:58:7: note: expanded from macro 'AT_PRIVATE_CHECK_SELECTIVE_BUILD'
58 | AT_ERROR( \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:711:32: note: expanded from macro 'AT_ERROR'
711 | C10_EXPAND_MSVC_WORKAROUND(TORCH_CHECK(false, ::c10::str(__VA_ARGS__))); \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:536:9: note: expanded from macro 'TORCH_CHECK'
536 | __func__, \
| ^