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2_ShallowWideMLPmin_sync_warp_base

Level 3 • Task 2
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor, weights: nn.ParameterList, biases: nn.ParameterList
) -> torch.Tensor:
    """
    Implements a shallow wide multi-layer perceptron with ReLU activation.

    Args:
        x (torch.Tensor): The input tensor, shape (batch_size, input_size)
        weights (nn.ParameterList): A list of weight tensors for each linear layer
        biases (nn.ParameterList): A list of bias tensors for each linear layer

    Returns:
        torch.Tensor: The output tensor, shape (batch_size, output_size)
    """
    for weight, bias in zip(weights[:-1], biases[:-1]):
        x = F.linear(x, weight, bias)
        x = F.relu(x)
    x = F.linear(x, weights[-1], biases[-1])
    return x


class Model(nn.Module):
    def __init__(self, input_size, hidden_layer_sizes, output_size):
        """
        :param input_size: The number of input features
        :param hidden_layer_sizes: A list of ints containing the sizes of each hidden layer
        :param output_size: The number of output features
        """
        super(Model, self).__init__()

        self.weights = nn.ParameterList()
        self.biases = nn.ParameterList()

        current_input_size = input_size
        for hidden_size in hidden_layer_sizes:
            linear = nn.Linear(current_input_size, hidden_size)
            self.weights.append(nn.Parameter(linear.weight.data.clone()))
            self.biases.append(nn.Parameter(linear.bias.data.clone()))
            current_input_size = hidden_size

        linear = nn.Linear(current_input_size, output_size)
        self.weights.append(nn.Parameter(linear.weight.data.clone()))
        self.biases.append(nn.Parameter(linear.bias.data.clone()))

    def forward(self, x, fn=module_fn):
        return fn(x, self.weights, self.biases)


# Test code
batch_size = 1
input_size = 1000
hidden_layer_sizes = [2000, 2000]  # Example of deep and narrow layers
output_size = 10


def get_inputs():
    return [torch.randn(batch_size, input_size)]


def get_init_inputs():
    return [input_size, hidden_layer_sizes, output_size]
import torch
import torch.nn as nn
import torch.nn.functional as F

class Model(nn.Module):
    def __init__(self, input_size, hidden_layer_sizes, output_size):
        """
        :param input_size: The number of input features
        :param hidden_layer_sizes: A list of ints containing the sizes of each hidden layer
        :param output_size: The number of output features
        """
        super(Model, self).__init__()
        
        layers = []
        current_input_size = input_size
        
        for hidden_size in hidden_layer_sizes:
            layers.append(nn.Linear(current_input_size, hidden_size))
            layers.append(nn.ReLU())
            current_input_size = hidden_size
        
        layers.append(nn.Linear(current_input_size, output_size))
        
        self.network = nn.Sequential(*layers)
    
    def forward(self, x):
        """
        :param x: The input tensor, shape (batch_size, input_size)
        :return: The output tensor, shape (batch_size, output_size)
        """
        return self.network(x)

# Test code
batch_size = 1
input_size = 1000
hidden_layer_sizes = [2000, 2000]  # Example of deep and narrow layers
output_size = 10

def get_inputs():
    return [torch.randn(batch_size, input_size)]

def get_init_inputs():
    return [input_size, hidden_layer_sizes, output_size]

Kernel Information

Related Kernels (Level 3, Task 2 • 2_ShallowWideMLP)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 min_sync_warp_base 0.04 2.29 4.36
🥈 optimized_reduction_warp_v2_base 0.04 2.24 4.25
🥈 efficient_mlp_forward_kernel_base 0.04 2.24 4.25
4 warp_index_optimized_base 0.04 2.18 4.15
4 warp_shfl_optimized_base 0.04 2.18 4.15
4 stride_loop_optimization_base 0.04 2.18 4.15
4 warp_dot_base 0.04 2.18 4.15
4 coalesced_vectorized_base 0.04 2.18 4.15
4 tiled_warp_forward_base 0.04 2.18 4.15
4 uniform_control_flow_base_base 0.04 2.18 4.15
4 warp_dot_optimized_block_base 0.04 2.18 4.15
4 tuned_block_size_reduction_v2_base 0.04 2.18 4.15
4 tuned_block_size_reduction_v2_edit_1 0.04 2.18 4.15
14 warp_uniform_control_flow_base 0.04 2.13 4.05
15 block_reduce_mlp_2d_base 0.04 2.09 3.96
16 warp_coalesced_optimized_block_base 0.05 1.99 3.79
17 reduced_shared_warp_edit_1 0.05 1.91 3.63
18 reduced_shared_warp_base 0.05 1.87 3.56
19 hybrid_mlp_forward_base 0.06 1.61 3.06
19 hybrid_mlp_forward_base 0.06 1.61 3.06
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>

// Reserve 64KB constant memory for biases
__constant__ char constant_bias[65536];

// Optimized MLP kernel with conditional synchronization
// Each block computes one output element using warp-level reduction
// __syncthreads() is called only when blockDim.x > warpSize

template <typename scalar_t>
__global__ void mlp_forward_kernel_min_sync(
    const scalar_t* __restrict__ input,
    const scalar_t* __restrict__ weight,
    scalar_t* __restrict__ output,
    const int batch_size,
    const int in_features,
    const int out_features) {

    // Identify output element by (row, col)
    const int row = blockIdx.x;  // Batch index
    const int col = blockIdx.y;  // Output feature index
    const int tid = threadIdx.x;
    const int warp_id = tid / warpSize;
    const int lane = tid & (warpSize - 1);

    // Use externally allocated shared memory for warp partial sums
    extern __shared__ char shared_mem[];
    scalar_t* sdata = reinterpret_cast<scalar_t*>(shared_mem);

    if (row < batch_size && col < out_features) {
        scalar_t sum = 0;
        const int input_offset = row * in_features;
        const int weight_offset = col * in_features;

        // Loop over in_features with 4x unrolling
        const int total = in_features;
        const int stride = blockDim.x * 4;
        for (int i = tid * 4; i < total; i += stride) {
            scalar_t temp = 0;
            if (i + 3 < total) {
                temp = input[input_offset + i]     * weight[weight_offset + i] +
                       input[input_offset + i + 1] * weight[weight_offset + i + 1] +
                       input[input_offset + i + 2] * weight[weight_offset + i + 2] +
                       input[input_offset + i + 3] * weight[weight_offset + i + 3];
            } else {
                for (int j = 0; j < 4 && (i + j) < total; j++) {
                    temp += input[input_offset + i + j] * weight[weight_offset + i + j];
                }
            }
            sum += temp;
        }

        // Warp-level reduction using shuffle intrinsics
        for (int offset = warpSize / 2; offset > 0; offset /= 2) {
            sum += __shfl_down_sync(0xffffffff, sum, offset);
        }

        // Each warp's first thread writes its sum to shared memory
        if (lane == 0) {
            sdata[warp_id] = sum;
        }
        // Synchronize across block only if more than one warp is active
        if (blockDim.x > warpSize)
            __syncthreads();

        // Final reduction by thread 0
        if (tid == 0) {
            scalar_t final_sum = 0;
            int num_warps = (blockDim.x + warpSize - 1) / warpSize;
            for (int w = 0; w < num_warps; w++) {
                final_sum += sdata[w];
            }
            // Add bias from constant memory
            final_sum += reinterpret_cast<const scalar_t*>(constant_bias)[col];
            output[row * out_features + col] = final_sum;
        }
    }
}

// Standard ReLU kernel remains unchanged

template <typename scalar_t>
__global__ void relu_kernel(
    scalar_t* __restrict__ data,
    const int size) {
    const int idx = blockIdx.x * blockDim.x + threadIdx.x;
    const int stride = blockDim.x * gridDim.x;
    for (int i = idx; i < size; i += stride) {
        data[i] = data[i] > 0 ? data[i] : 0;
    }
}

// Host function chaining layers: launching the MLP kernel and applying ReLU between layers

torch::Tensor mlp_cuda_forward(
    torch::Tensor input,
    std::vector<torch::Tensor> weights,
    std::vector<torch::Tensor> biases) {

    auto device = input.device();
    int num_layers = weights.size();
    auto current = input;

    for (int i = 0; i < num_layers; i++) {
        int batch_size = current.size(0);
        int in_features = current.size(1);
        int out_features = weights[i].size(0);

        auto output = torch::empty({batch_size, out_features}, 
                                     torch::dtype(current.dtype()).device(device));

        // Copy bias to constant memory if it fits
        AT_DISPATCH_FLOATING_TYPES(current.scalar_type(), "bias_copy", ([&] {
            size_t bias_bytes = out_features * sizeof(scalar_t);
            if (bias_bytes <= sizeof(constant_bias)) {
                cudaMemcpyToSymbol(constant_bias, biases[i].data_ptr<scalar_t>(), bias_bytes);
            }
        }));

        // Configure thread block size and dynamic shared memory size
        const int threads = 256;  // Must be a multiple of warpSize
        int shared_mem_size = (threads / 32) * sizeof(float);  // Allocation for warp-level sums
        dim3 blocks(batch_size, out_features);

        AT_DISPATCH_FLOATING_TYPES(current.scalar_type(), "mlp_forward_kernel_min_sync", ([&] {
            mlp_forward_kernel_min_sync<scalar_t><<<blocks, threads, shared_mem_size>>>(
                current.data_ptr<scalar_t>(),
                weights[i].data_ptr<scalar_t>(),
                output.data_ptr<scalar_t>(),
                batch_size,
                in_features,
                out_features
            );
        }));

        // Apply ReLU activation for intermediate layers
        if (i < num_layers - 1) {
            int size = batch_size * out_features;
            int thread_per_block = 256;
            int num_blocks = (size + thread_per_block - 1) / thread_per_block;
            AT_DISPATCH_FLOATING_TYPES(output.scalar_type(), "relu_kernel", ([&] {
                relu_kernel<scalar_t><<<num_blocks, thread_per_block>>>(
                    output.data_ptr<scalar_t>(),
                    size
                );
            }));
        }

        current = output;
    }

    return current;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &mlp_cuda_forward, "MLP forward (CUDA) with minimized synchronizations");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.224 inst/cycle 0.000 5
Executed Ipc Elapsed 0.000 inst/cycle 0.000 5
Issue Slots Busy 6.232 % 0.179 5
Issued Ipc Active 0.248 inst/cycle 0.000 5
SM Busy 6.232 % 0.179 5
Memory Throughput 3409164399.160 byte/second 19543318049775320.000 5
Mem Busy 9.482 % 0.090 5
Max Bandwidth 4.882 % 0.025 5
L1/TEX Hit Rate 50.000 % 0.000 5
L2 Hit Rate 100.684 % 0.070 5
Mem Pipes Busy 0.130 % 0.000 5
Warp Cycles Per Issued Instruction 33.458 cycle 9.321 5
Warp Cycles Per Executed Instruction 37.522 cycle 11.732 5
Avg. Active Threads Per Warp 31.800 0.000 5
Avg. Not Predicated Off Threads Per Warp 27.370 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 10.000 block 0.000 5
Block Limit Shared Mem 32.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 12.040 % 0.066 5
Achieved Active Warps Per SM 7.704 warp 0.027 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (12.2%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 673665.06 μs
Device Time 2601.43 μs
Self CPU Time 74.70 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 673590.36 μs
Device Time 2601.43 μs
Self CPU Time 162.22 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 670332.50 μs
Device Time 0.00 μs
Self CPU Time 229.30 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 665195.93 μs
Device Time 0.00 μs
Self CPU Time 665195.93 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 117810.22 μs
Device Time 41484.91 μs
Self CPU Time 117810.22 μs
Self Device Time 41484.91 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void mlp_forward_kernel_min_sync<float>(float const*, float const*, float*, int, int, int)
CPU Time 0.00 μs
Device Time 106824.11 μs
Self CPU Time 0.00 μs
Self Device Time 106824.11 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaEventRecord
CPU Time 236009.32 μs
Device Time 16046.04 μs
Self CPU Time 236009.32 μs
Self Device Time 16046.04 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 49384.40 μs
Device Time 382420.54 μs
Self CPU Time 9558.96 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 39827.21 μs
Device Time 382420.54 μs
Self CPU Time 10755.87 μs
Self Device Time 382420.54 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 382420.54 μs
Self CPU Time 0.00 μs
Self Device Time 382420.54 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed
45299 warnings generated when compiling for host.
Suppressed 45323 warnings (45276 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:17:5 bugprone-easily-swappable-parameters
17 | const int batch_size,
| ^~~~~~~~~~~~~~~~~~~~~
18 | const int in_features,
| ~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:17:15: note: the first parameter in the range is 'batch_size'
17 | const int batch_size,
| ^~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:18:15: note: the last parameter in the range is 'in_features'
18 | const int in_features,
| ^~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:22:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
22 | const int row = blockIdx.x; // Batch index
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:23:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
23 | const int col = blockIdx.y; // Output feature index
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:24:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
24 | const int tid = threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:39:28: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
39 | const int stride = blockDim.x * 4;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:71:29: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
71 | int num_warps = (blockDim.x + warpSize - 1) / warpSize;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:88:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
88 | const int idx = blockIdx.x * blockDim.x + threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:89:24: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
89 | const int stride = blockDim.x * gridDim.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:98:19: warning: the parameter 'input' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
98 | torch::Tensor input,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:99:5: warning: 2 adjacent parameters of 'mlp_cuda_forward' of similar type ('std::vector<torch::Tensor>') are easily swapped by mistake [bugprone-easily-swappable-parameters]
99 | std::vector<torch::Tensor> weights,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
100 | std::vector<torch::Tensor> biases) {
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:99:32: note: the first parameter in the range is 'weights'
99 | std::vector<torch::Tensor> weights,
| ^~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:100:32: note: the last parameter in the range is 'biases'
100 | std::vector<torch::Tensor> biases) {
| ^~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:103:22: warning: narrowing conversion from 'size_type' (aka 'unsigned long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
103 | int num_layers = weights.size();
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:107:26: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
107 | int batch_size = current.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:108:27: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
108 | int in_features = current.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:109:28: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
109 | int out_features = weights[i].size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:115:9: warning: inside a lambda, '__func__' expands to the name of the function call operator; consider capturing the name of the enclosing function explicitly [bugprone-lambda-function-name]
115 | AT_DISPATCH_FLOATING_TYPES(current.scalar_type(), "bias_copy", ([&] {
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:237:34: note: expanded from macro 'AT_DISPATCH_FLOATING_TYPES'
237 | AT_DISPATCH_SWITCH(TYPE, NAME, AT_DISPATCH_CASE_FLOATING_TYPES(__VA_ARGS__))
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:233:3: note: expanded from macro 'AT_DISPATCH_CASE_FLOATING_TYPES'
233 | AT_DISPATCH_CASE(at::ScalarType::Double, __VA_ARGS__) \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:74:3: note: expanded from macro 'AT_DISPATCH_CASE'
74 | AT_PRIVATE_CASE_TYPE_USING_HINT(enum_type, scalar_t, __VA_ARGS__)
| ^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:58:7: note: expanded from macro 'AT_PRIVATE_CHECK_SELECTIVE_BUILD'
58 | AT_ERROR( \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:711:32: note: expanded from macro 'AT_ERROR'
711 | C10_EXPAND_MSVC_WORKAROUND(TORCH_CHECK(false, ::c10::str(__VA_ARGS__))); \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:536:9: note: expanded from macro 'TORCH_CHECK'
536 | __func__, \
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:127:9: warning: inside a lambda, '__func__' expands to the name of the function call operator; consider capturing the name of the enclosing function explicitly [bugprone-lambda-function-name]
127 | AT_DISPATCH_FLOATING_TYPES(current.scalar_type(), "mlp_forward_kernel_min_sync", ([&] {
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:237:34: note: expanded from macro 'AT_DISPATCH_FLOATING_TYPES'
237 | AT_DISPATCH_SWITCH(TYPE, NAME, AT_DISPATCH_CASE_FLOATING_TYPES(__VA_ARGS__))
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:233:3: note: expanded from macro 'AT_DISPATCH_CASE_FLOATING_TYPES'
233 | AT_DISPATCH_CASE(at::ScalarType::Double, __VA_ARGS__) \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:74:3: note: expanded from macro 'AT_DISPATCH_CASE'
74 | AT_PRIVATE_CASE_TYPE_USING_HINT(enum_type, scalar_t, __VA_ARGS__)
| ^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:58:7: note: expanded from macro 'AT_PRIVATE_CHECK_SELECTIVE_BUILD'
58 | AT_ERROR( \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:711:32: note: expanded from macro 'AT_ERROR'
711 | C10_EXPAND_MSVC_WORKAROUND(TORCH_CHECK(false, ::c10::str(__VA_ARGS__))); \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:536:9: note: expanded from macro 'TORCH_CHECK'
536 | __func__, \
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_2/b5_s1_min_sync_warp/base/base.cu:143:13: warning: inside a lambda, '__func__' expands to the name of the function call operator; consider capturing the name of the enclosing function explicitly [bugprone-lambda-function-name]
143 | AT_DISPATCH_FLOATING_TYPES(output.scalar_type(), "relu_kernel", ([&] {
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:237:34: note: expanded from macro 'AT_DISPATCH_FLOATING_TYPES'
237 | AT_DISPATCH_SWITCH(TYPE, NAME, AT_DISPATCH_CASE_FLOATING_TYPES(__VA_ARGS__))
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:233:3: note: expanded from macro 'AT_DISPATCH_CASE_FLOATING_TYPES'
233 | AT_DISPATCH_CASE(at::ScalarType::Double, __VA_ARGS__) \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:74:3: note: expanded from macro 'AT_DISPATCH_CASE'
74 | AT_PRIVATE_CASE_TYPE_USING_HINT(enum_type, scalar_t, __VA_ARGS__)
| ^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:58:7: note: expanded from macro 'AT_PRIVATE_CHECK_SELECTIVE_BUILD'
58 | AT_ERROR( \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:711:32: note: expanded from macro 'AT_ERROR'
711 | C10_EXPAND_MSVC_WORKAROUND(TORCH_CHECK(false, ::c10::str(__VA_ARGS__))); \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:536:9: note: expanded from macro 'TORCH_CHECK'
536 | __func__, \
| ^