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21_Sigmoid • sigmoid_ldg_vectorized_base

Level 1 • Task 21
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(x: torch.Tensor) -> torch.Tensor:
    """
    Applies Sigmoid activation to the input tensor.

    Args:
        x (torch.Tensor): Input tensor of any shape.

    Returns:
        torch.Tensor: Output tensor with Sigmoid applied, same shape as input.
    """
    return torch.sigmoid(x)


class Model(nn.Module):
    """
    Simple model that performs a Sigmoid activation.
    """

    def __init__(self):
        super(Model, self).__init__()

    def forward(self, x: torch.Tensor, fn=module_fn) -> torch.Tensor:
        return fn(x)


batch_size = 16
dim = 16384


def get_inputs():
    x = torch.randn(batch_size, dim)
    return [x]


def get_init_inputs():
    return []  # No special initialization inputs needed

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Simple model that performs a Sigmoid activation.
    """
    def __init__(self):
        super(Model, self).__init__()
    
    def forward(self, x: torch.Tensor) -> torch.Tensor:
        """
        Applies Sigmoid activation to the input tensor.

        Args:
            x (torch.Tensor): Input tensor of any shape.

        Returns:
            torch.Tensor: Output tensor with Sigmoid applied, same shape as input.
        """
        return torch.sigmoid(x)

batch_size = 16
dim = 16384

def get_inputs():
    x = torch.randn(batch_size, dim)
    return [x]

def get_init_inputs():
    return []  # No special initialization inputs needed
Download Evaluation Download PyTorch Download CUDA Download Profiles

Kernel Information

Operation Name 21_Sigmoid
Level ID 1
Task ID 21
Kernel Name sigmoid_ldg_vectorized_base
CUDA Speedup (Native) 1.109x
CUDA Speedup (Compile) 4.825x
CUDA Runtime 0.006 ms
PyTorch Runtime (Native) 0.007 ms
PyTorch Runtime (Compile) 0.029 ms
Correct True
Max Diff (vs. Reference) 0.000000
Model o3-mini-2025-01-31
Temperature 1.00
View Experiment Progress Details

Related Kernels (Level 1, Task 21 • 21_Sigmoid)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 sigmoid_shared_mem_optimized_base 0.01 1.11 4.82
🥇 21_sigmoid_modular_device_base 0.01 1.11 4.82
🥇 sigmoid_unroll_optimized_base_base 0.01 1.11 4.82
🥇 sigmoid_min_sync_base_base 0.01 1.11 4.82
🥇 optimized_sigmoid_cuda_base 0.01 1.11 4.82
🥇 optimized_sigmoid_limited_sync_base 0.01 1.11 4.82
🥇 sigmoid_ldg_vectorized_base 0.01 1.11 4.82
🥇 optimized_sigmoid_cuda_base 0.01 1.11 4.82
🥇 optimized_sigmoid_vectorized_combined_edit_1 0.01 1.11 4.82
🥇 21_Sigmoid_optimized_memory_base 0.01 1.11 4.82
🥇 sigmoid_minimal_sync_base_base 0.01 1.11 4.82
🥇 vectorized_ldg_aligned_edit_1 0.01 1.11 4.82
🥇 nondivergent_vectorized_sigmoid_base 0.01 1.11 4.82
🥇 vectorized_no_sync_base 0.01 1.11 4.82
🥇 vectorized_sigmoid_base 0.01 1.11 4.82
🥇 syncthreads_minimal_sigmoid_base 0.01 1.11 4.82
🥇 vectorized_ldg_aligned_base 0.01 1.11 4.82
🥇 optimized_sigmoid_vectorized_combined_base 0.01 1.11 4.82
🥇 optimized_sigmoid_blocksize_tuning_edit_1 0.01 1.11 4.82
🥇 optimized_sigmoid_blocksize_tuning_base 0.01 1.11 4.82 
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <type_traits>

// The kernel uses __ldg() for read-only global memory loads and vectorized loads/stores
// to ensure 128-bit aligned memory accesses. This improves memory bandwidth and reduces latency.

template <typename scalar_t>
__global__ void sigmoid_kernel(const scalar_t* __restrict__ input,
                               scalar_t* __restrict__ output,
                               const int64_t size) {
  int idx = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;

  // Specialize for float using float4 vectorization (128-bit loads)
  if constexpr (std::is_same<scalar_t, float>::value) {
    int vec_size = size / 4;  // number of complete float4 groups
    float4* out_vec = reinterpret_cast<float4*>(output);
    const float4* in_vec = reinterpret_cast<const float4*>(input);
    
    // Process vectorized portion
    for (int i = idx; i < vec_size; i += stride) {
      // Use __ldg() for read-only load
      float4 in_val = __ldg(&in_vec[i]);
      float y0 = 1.0f / (1.0f + __expf(-in_val.x));
      float y1 = 1.0f / (1.0f + __expf(-in_val.y));
      float y2 = 1.0f / (1.0f + __expf(-in_val.z));
      float y3 = 1.0f / (1.0f + __expf(-in_val.w));
      float4 out_val = make_float4(y0, y1, y2, y3);
      out_vec[i] = out_val;
    }
    
    // Process any remaining elements
    int leftover = size - vec_size * 4;
    int start = vec_size * 4;
    for (int i = idx; i < leftover; i += stride) {
      int index = start + i;
      float in_val = __ldg(&input[index]);
      output[index] = 1.0f / (1.0f + __expf(-in_val));
    }
  } 
  // Specialize for double using double2 vectorization
  else if constexpr (std::is_same<scalar_t, double>::value) {
    int vec_size = size / 2;  // number of complete double2 groups (2*64 bits = 128 bits)
    double2* out_vec = reinterpret_cast<double2*>(output);
    const double2* in_vec = reinterpret_cast<const double2*>(input);

    // Process vectorized portion
    for (int i = idx; i < vec_size; i += stride) {
      // __ldg() used for read-only load
      double2 in_val = __ldg(&in_vec[i]);
      double y0 = 1.0 / (1.0 + exp(-in_val.x));
      double y1 = 1.0 / (1.0 + exp(-in_val.y));
      double2 out_val;
      out_val.x = y0;
      out_val.y = y1;
      out_vec[i] = out_val;
    }

    // Process remaining element if size is odd
    int leftover = size - vec_size * 2;
    int start = vec_size * 2;
    for (int i = idx; i < leftover; i += stride) {
      int index = start + i;
      double in_val = __ldg(&input[index]);
      output[index] = 1.0 / (1.0 + exp(-in_val));
    }
  }
}


torch::Tensor forward(torch::Tensor input) {
  auto output = torch::empty_like(input);
  const int64_t size = input.numel();
  
  const int threads = 256;
  const int blocks = (size + threads - 1) / threads;
  
  AT_DISPATCH_FLOATING_TYPES(input.scalar_type(), "sigmoid_kernel", ([&] {
    const auto* input_data = input.data_ptr<scalar_t>();
    auto* output_data = output.data_ptr<scalar_t>();
    sigmoid_kernel<scalar_t><<<blocks, threads>>>(input_data, output_data, size);
  }));
  
  return output;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
  m.def("forward", &forward, "Sigmoid forward (CUDA) with __ldg() and 128-bit aligned accesses");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.816 inst/cycle 0.000 5
Executed Ipc Elapsed 0.304 inst/cycle 0.000 5
Issue Slots Busy 22.858 % 0.046 5
Issued Ipc Active 0.916 inst/cycle 0.000 5
SM Busy 22.858 % 0.046 5
Memory Throughput 283454724761.140 byte/second 21261557778794172416.000 5
Mem Busy 13.526 % 0.036 5
Max Bandwidth 12.484 % 0.032 5
L1/TEX Hit Rate 0.000 % 0.000 5
L2 Hit Rate 66.594 % 0.026 5
Mem Pipes Busy 13.108 % 0.040 5
Warp Cycles Per Issued Instruction 39.712 cycle 21.686 5
Warp Cycles Per Executed Instruction 44.588 cycle 27.319 5
Avg. Active Threads Per Warp 32.000 0.000 5
Avg. Not Predicated Off Threads Per Warp 31.440 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 10.000 block 0.000 5
Block Limit Shared Mem 32.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 54.584 % 0.075 5
Achieved Active Warps Per SM 34.936 warp 0.030 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (54.3%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 614289.17 μs
Device Time 40.19 μs
Self CPU Time 41.50 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 614247.68 μs
Device Time 40.19 μs
Self CPU Time 87.50 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 633426.82 μs
Device Time 0.00 μs
Self CPU Time 19597.94 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 608758.87 μs
Device Time 0.00 μs
Self CPU Time 608758.87 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 486994.09 μs
Device Time 22252.60 μs
Self CPU Time 486994.09 μs
Self Device Time 22252.60 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void sigmoid_kernel<float>(float const*, float*, long)
CPU Time 0.00 μs
Device Time 24727.47 μs
Self CPU Time 0.00 μs
Self Device Time 24727.47 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaEventRecord
CPU Time 19062.41 μs
Device Time 42926.76 μs
Self CPU Time 19062.41 μs
Self Device Time 42926.76 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 64219.98 μs
Device Time 636205.72 μs
Self CPU Time 13924.58 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 50297.99 μs
Device Time 636205.72 μs
Self CPU Time 16155.79 μs
Self Device Time 636205.72 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 636205.72 μs
Self CPU Time 0.00 μs
Self Device Time 636205.72 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed 
45286 warnings generated when compiling for host.
Suppressed 45321 warnings (45274 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_21/b7_s3_sigmoid_ldg_vectorized/base/base.cu:13:13 bugprone-narrowing-conversions
13 | int idx = blockIdx.x * blockDim.x + threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_21/b7_s3_sigmoid_ldg_vectorized/base/base.cu:14:16: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
14 | int stride = blockDim.x * gridDim.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_21/b7_s3_sigmoid_ldg_vectorized/base/base.cu:18:20: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
18 | int vec_size = size / 4; // number of complete float4 groups
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_21/b7_s3_sigmoid_ldg_vectorized/base/base.cu:35:20: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
35 | int leftover = size - vec_size * 4;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_21/b7_s3_sigmoid_ldg_vectorized/base/base.cu:35:27: warning: performing an implicit widening conversion to type 'int64_t' (aka 'long') of a multiplication performed in type 'int' [bugprone-implicit-widening-of-multiplication-result]
35 | int leftover = size - vec_size * 4;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_21/b7_s3_sigmoid_ldg_vectorized/base/base.cu:35:27: note: make conversion explicit to silence this warning
4 | int leftover = size - vec_size * 4;
| ^~~~~~~~~~~~
| static_cast<int64_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_21/b7_s3_sigmoid_ldg_vectorized/base/base.cu:35:27: note: perform multiplication in a wider type
35 | int leftover = size - vec_size * 4;
| ^~~~~~~~
| static_cast<int64_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_21/b7_s3_sigmoid_ldg_vectorized/base/base.cu:45:20: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
45 | int vec_size = size / 2; // number of complete double2 groups (2*64 bits = 128 bits)
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_21/b7_s3_sigmoid_ldg_vectorized/base/base.cu:62:20: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
62 | int leftover = size - vec_size * 2;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_21/b7_s3_sigmoid_ldg_vectorized/base/base.cu:62:27: warning: performing an implicit widening conversion to type 'int64_t' (aka 'long') of a multiplication performed in type 'int' [bugprone-implicit-widening-of-multiplication-result]
62 | int leftover = size - vec_size * 2;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_21/b7_s3_sigmoid_ldg_vectorized/base/base.cu:62:27: note: make conversion explicit to silence this warning
62 | int leftover = size - vec_size * 2;
| ^~~~~~~~~~~~
| static_cast<int64_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_21/b7_s3_sigmoid_ldg_vectorized/base/base.cu:62:27: note: perform multiplication in a wider type
62 | int leftover = size - vec_size * 2;
| ^~~~~~~~
| static_cast<int64_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_21/b7_s3_sigmoid_ldg_vectorized/base/base.cu:78:22: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
78 | const int blocks = (size + threads - 1) / threads;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250202_optimize_b10_s4_e0_sweep/level_1/task_21/b7_s3_sigmoid_ldg_vectorized/base/base.cu:80:3: warning: inside a lambda, '__func__' expands to the name of the function call operator; consider capturing the name of the enclosing function explicitly [bugprone-lambda-function-name]
80 | AT_DISPATCH_FLOATING_TYPES(input.scalar_type(), "sigmoid_kernel", ([&] {
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:237:34: note: expanded from macro 'AT_DISPATCH_FLOATING_TYPES'
237 | AT_DISPATCH_SWITCH(TYPE, NAME, AT_DISPATCH_CASE_FLOATING_TYPES(__VA_ARGS__))
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:233:3: note: expanded from macro 'AT_DISPATCH_CASE_FLOATING_TYPES'
233 | AT_DISPATCH_CASE(at::ScalarType::Double, __VA_ARGS__) \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:74:3: note: expanded from macro 'AT_DISPATCH_CASE'
74 | AT_PRIVATE_CASE_TYPE_USING_HINT(enum_type, scalar_t, __VA_ARGS__)
| ^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:58:7: note: expanded from macro 'AT_PRIVATE_CHECK_SELECTIVE_BUILD'
58 | AT_ERROR( \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:711:32: note: expanded from macro 'AT_ERROR'
711 | C10_EXPAND_MSVC_WORKAROUND(TORCH_CHECK(false, ::c10::str(__VA_ARGS__))); \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:536:9: note: expanded from macro 'TORCH_CHECK'
536 | __func__, \
| ^