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21_Sigmoidvectorized_sigmoid_base

Level 1 • Task 21
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(x: torch.Tensor) -> torch.Tensor:
    """
    Applies Sigmoid activation to the input tensor.

    Args:
        x (torch.Tensor): Input tensor of any shape.

    Returns:
        torch.Tensor: Output tensor with Sigmoid applied, same shape as input.
    """
    return torch.sigmoid(x)


class Model(nn.Module):
    """
    Simple model that performs a Sigmoid activation.
    """

    def __init__(self):
        super(Model, self).__init__()

    def forward(self, x: torch.Tensor, fn=module_fn) -> torch.Tensor:
        return fn(x)


batch_size = 16
dim = 16384


def get_inputs():
    x = torch.randn(batch_size, dim)
    return [x]


def get_init_inputs():
    return []  # No special initialization inputs needed
import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Simple model that performs a Sigmoid activation.
    """
    def __init__(self):
        super(Model, self).__init__()
    
    def forward(self, x: torch.Tensor) -> torch.Tensor:
        """
        Applies Sigmoid activation to the input tensor.

        Args:
            x (torch.Tensor): Input tensor of any shape.

        Returns:
            torch.Tensor: Output tensor with Sigmoid applied, same shape as input.
        """
        return torch.sigmoid(x)

batch_size = 16
dim = 16384

def get_inputs():
    x = torch.randn(batch_size, dim)
    return [x]

def get_init_inputs():
    return []  # No special initialization inputs needed

Kernel Information

Related Kernels (Level 1, Task 21 • 21_Sigmoid)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 sigmoid_shared_mem_optimized_base 0.01 1.11 4.82
🥇 21_sigmoid_modular_device_base 0.01 1.11 4.82
🥇 sigmoid_unroll_optimized_base_base 0.01 1.11 4.82
🥇 sigmoid_min_sync_base_base 0.01 1.11 4.82
🥇 optimized_sigmoid_cuda_base 0.01 1.11 4.82
🥇 optimized_sigmoid_limited_sync_base 0.01 1.11 4.82
🥇 sigmoid_ldg_vectorized_base 0.01 1.11 4.82
🥇 optimized_sigmoid_cuda_base 0.01 1.11 4.82
🥇 optimized_sigmoid_vectorized_combined_edit_1 0.01 1.11 4.82
🥇 21_Sigmoid_optimized_memory_base 0.01 1.11 4.82
🥇 sigmoid_minimal_sync_base_base 0.01 1.11 4.82
🥇 vectorized_ldg_aligned_edit_1 0.01 1.11 4.82
🥇 nondivergent_vectorized_sigmoid_base 0.01 1.11 4.82
🥇 vectorized_no_sync_base 0.01 1.11 4.82
🥇 vectorized_sigmoid_base 0.01 1.11 4.82
🥇 syncthreads_minimal_sigmoid_base 0.01 1.11 4.82
🥇 vectorized_ldg_aligned_base 0.01 1.11 4.82
🥇 optimized_sigmoid_vectorized_combined_base 0.01 1.11 4.82
🥇 optimized_sigmoid_blocksize_tuning_edit_1 0.01 1.11 4.82
🥇 optimized_sigmoid_blocksize_tuning_base 0.01 1.11 4.82
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>

template<typename T>
__device__ __forceinline__ T sigmoid_compute(T val) {
    T exp_val = expf(-val);
    return 1.0f / (1.0f + exp_val);
}

template<typename scalar_t>
__global__ void sigmoid_kernel_vectorized(const scalar_t* __restrict__ input,
                                         scalar_t* __restrict__ output,
                                         const int64_t size) {
    constexpr int vec_size = sizeof(float4) / sizeof(scalar_t);
    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    int stride = blockDim.x * gridDim.x;

    for (int i = tid * vec_size; i < size; i += stride * vec_size) {
        float4 chunk;
        chunk.x = sigmoid_compute(static_cast<float>(input[i]));
        if (i + 1 < size) chunk.y = sigmoid_compute(static_cast<float>(input[i+1]));
        if (i + 2 < size) chunk.z = sigmoid_compute(static_cast<float>(input[i+2]));
        if (i + 3 < size) chunk.w = sigmoid_compute(static_cast<float>(input[i+3]));

        *reinterpret_cast<float4*>(&output[i]) = chunk;
    }
}

torch::Tensor forward(torch::Tensor input) {
    auto output = torch::empty_like(input);
    const int64_t size = input.numel();

    const int threads = 256;
    const int blocks = (size + threads * 4 - 1) / (threads * 4);

    AT_DISPATCH_FLOATING_TYPES(input.scalar_type(), "sigmoid_kernel", [&] {
        sigmoid_kernel_vectorized<scalar_t><<<blocks, threads>>>( 
            input.data_ptr<scalar_t>(),
            output.data_ptr<scalar_t>(),
            size
        );
    });

    return output;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &forward, "Vectorized Sigmoid forward (CUDA)");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.410 inst/cycle 0.001 5
Executed Ipc Elapsed 0.170 inst/cycle 0.000 5
Issue Slots Busy 11.076 % 0.390 5
Issued Ipc Active 0.442 inst/cycle 0.001 5
SM Busy 11.076 % 0.390 5
Memory Throughput 282427127018.846 byte/second 6094869420701592576.000 5
Mem Busy 13.412 % 0.050 5
Max Bandwidth 12.296 % 0.031 5
L1/TEX Hit Rate 60.000 % 0.000 5
L2 Hit Rate 67.244 % 0.078 5
Mem Pipes Busy 2.118 % 0.001 5
Warp Cycles Per Issued Instruction 29.684 cycle 0.006 5
Warp Cycles Per Executed Instruction 31.964 cycle 0.007 5
Avg. Active Threads Per Warp 32.000 0.000 5
Avg. Not Predicated Off Threads Per Warp 31.020 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 10.000 block 0.000 5
Block Limit Shared Mem 32.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 21.710 % 0.011 5
Achieved Active Warps Per SM 13.896 warp 0.005 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (21.7%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 392640.83 μs
Device Time 40.06 μs
Self CPU Time 45.67 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 392595.16 μs
Device Time 40.06 μs
Self CPU Time 82.56 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 410847.97 μs
Device Time 0.00 μs
Self CPU Time 18684.25 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 390248.16 μs
Device Time 0.00 μs
Self CPU Time 390248.16 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 454681.64 μs
Device Time 21071.75 μs
Self CPU Time 454681.64 μs
Self Device Time 21071.75 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void sigmoid_kernel_vectorized<float>(float const*, float*, long)
CPU Time 0.00 μs
Device Time 23179.36 μs
Self CPU Time 0.00 μs
Self Device Time 23179.36 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaEventRecord
CPU Time 21344.71 μs
Device Time 40490.62 μs
Self CPU Time 21344.71 μs
Self Device Time 40490.62 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 63218.87 μs
Device Time 600005.30 μs
Self CPU Time 11857.99 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 51362.35 μs
Device Time 600005.30 μs
Self CPU Time 16938.49 μs
Self Device Time 600005.30 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 600005.30 μs
Self CPU Time 0.00 μs
Self Device Time 600005.30 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed
45282 warnings generated when compiling for host.
Suppressed 45321 warnings (45274 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_1/task_21/b2_s3_vectorized_sigmoid/base/base.cu:16:15 bugprone-narrowing-conversions
16 | int tid = threadIdx.x + blockIdx.x * blockDim.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_1/task_21/b2_s3_vectorized_sigmoid/base/base.cu:17:18: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
17 | int stride = blockDim.x * gridDim.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_1/task_21/b2_s3_vectorized_sigmoid/base/base.cu:35:24: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
35 | const int blocks = (size + threads * 4 - 1) / (threads * 4);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_1/task_21/b2_s3_vectorized_sigmoid/base/base.cu:35:32: warning: performing an implicit widening conversion to type 'int64_t' (aka 'long') of a multiplication performed in type 'int' [bugprone-implicit-widening-of-multiplication-result]
35 | const int blocks = (size + threads * 4 - 1) / (threads * 4);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_1/task_21/b2_s3_vectorized_sigmoid/base/base.cu:35:32: note: make conversion explicit to silence this warning
35 | const int blocks = (size + threads * 4 - 1) / (threads * 4);
| ^~~~~~~~~~~
| static_cast<int64_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_1/task_21/b2_s3_vectorized_sigmoid/base/base.cu:35:32: note: perform multiplication in a wider type
35 | const int blocks = (size + threads * 4 - 1) / (threads * 4);
| ^~~~~~~
| static_cast<int64_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_1/task_21/b2_s3_vectorized_sigmoid/base/base.cu:35:52: warning: performing an implicit widening conversion to type 'int64_t' (aka 'long') of a multiplication performed in type 'int' [bugprone-implicit-widening-of-multiplication-result]
35 | const int blocks = (size + threads * 4 - 1) / (threads * 4);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_1/task_21/b2_s3_vectorized_sigmoid/base/base.cu:35:52: note: make conversion explicit to silence this warning
4 | const int blocks = (size + threads * 4 - 1) / (threads * 4);
| ^~~~~~~~~~~
| static_cast<int64_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_1/task_21/b2_s3_vectorized_sigmoid/base/base.cu:35:52: note: perform multiplication in a wider type
35 | const int blocks = (size + threads * 4 - 1) / (threads * 4);
| ^~~~~~~
| static_cast<int64_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_1/task_21/b2_s3_vectorized_sigmoid/base/base.cu:37:5: warning: inside a lambda, '__func__' expands to the name of the function call operator; consider capturing the name of the enclosing function explicitly [bugprone-lambda-function-name]
37 | AT_DISPATCH_FLOATING_TYPES(input.scalar_type(), "sigmoid_kernel", [&] {
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:237:34: note: expanded from macro 'AT_DISPATCH_FLOATING_TYPES'
237 | AT_DISPATCH_SWITCH(TYPE, NAME, AT_DISPATCH_CASE_FLOATING_TYPES(__VA_ARGS__))
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:233:3: note: expanded from macro 'AT_DISPATCH_CASE_FLOATING_TYPES'
233 | AT_DISPATCH_CASE(at::ScalarType::Double, __VA_ARGS__) \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:74:3: note: expanded from macro 'AT_DISPATCH_CASE'
74 | AT_PRIVATE_CASE_TYPE_USING_HINT(enum_type, scalar_t, __VA_ARGS__)
| ^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:58:7: note: expanded from macro 'AT_PRIVATE_CHECK_SELECTIVE_BUILD'
58 | AT_ERROR( \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:711:32: note: expanded from macro 'AT_ERROR'
711 | C10_EXPAND_MSVC_WORKAROUND(TORCH_CHECK(false, ::c10::str(__VA_ARGS__))); \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:536:9: note: expanded from macro 'TORCH_CHECK'
536 | __func__, \
| ^