import torch
import torch.nn as nn
import torch.nn.functional as F
def module_fn(x: torch.Tensor, alpha: float) -> torch.Tensor:
"""
Applies ELU activation to the input tensor.
Args:
x (torch.Tensor): Input tensor of any shape.
alpha (float): The alpha parameter for the ELU function.
Returns:
torch.Tensor: Output tensor with ELU applied, same shape as input.
"""
return F.elu(x, alpha=alpha)
class Model(nn.Module):
"""
Simple model that performs an ELU activation.
"""
def __init__(self, alpha):
"""
Initializes the ELU model.
Args:
alpha (float): The alpha parameter for the ELU function.
"""
super(Model, self).__init__()
self.alpha = alpha
def forward(self, x: torch.Tensor, fn=module_fn) -> torch.Tensor:
"""
Applies ELU activation to the input tensor.
Args:
x (torch.Tensor): Input tensor of any shape.
Returns:
torch.Tensor: Output tensor with ELU applied, same shape as input.
"""
return fn(x, self.alpha)
batch_size = 16
dim = 16384
alpha = 1.0
def get_inputs():
x = torch.randn(batch_size, dim)
return [x]
def get_init_inputs():
return [alpha]
import torch
import torch.nn as nn
import torch.nn.functional as F
class Model(nn.Module):
"""
Simple model that performs an ELU activation.
"""
def __init__(self, alpha: float = 1.0):
"""
Initializes the ELU model.
Args:
alpha (float, optional): The alpha parameter for the ELU function. Defaults to 1.0.
"""
super(Model, self).__init__()
self.alpha = alpha
def forward(self, x: torch.Tensor) -> torch.Tensor:
"""
Applies ELU activation to the input tensor.
Args:
x (torch.Tensor): Input tensor of any shape.
Returns:
torch.Tensor: Output tensor with ELU applied, same shape as input.
"""
return F.elu(x, alpha=self.alpha)
batch_size = 16
dim = 16384
def get_inputs():
x = torch.randn(batch_size, dim)
return [x]
def get_init_inputs():
return [1.0] # Provide alpha value for initialization
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <math.h>
#define CHECK_CUDA(x) TORCH_CHECK(x.is_cuda(), #x " must be a CUDA tensor")
#define CHECK_CONTIGUOUS(x) TORCH_CHECK(x.is_contiguous(), #x " must be contiguous")
#define CHECK_INPUT(x) CHECK_CUDA(x); CHECK_CONTIGUOUS(x)
__global__ void elu_kernel_coalesced(const float* __restrict__ x, float* __restrict__ out, float alpha, int n) {
// Process 4 elements per thread for better memory coalescing
int tid = threadIdx.x + blockIdx.x * blockDim.x;
int stride = blockDim.x * gridDim.x;
// Handle 4 elements at a time using float4
for (int i = tid * 4; i < n - 3; i += stride * 4) {
float4 in_val = *reinterpret_cast<const float4*>(x + i);
float4 out_val;
// Process each component
out_val.x = (in_val.x > 0) ? in_val.x : alpha * (expf(in_val.x) - 1);
out_val.y = (in_val.y > 0) ? in_val.y : alpha * (expf(in_val.y) - 1);
out_val.z = (in_val.z > 0) ? in_val.z : alpha * (expf(in_val.z) - 1);
out_val.w = (in_val.w > 0) ? in_val.w : alpha * (expf(in_val.w) - 1);
// Write result back to global memory
*reinterpret_cast<float4*>(out + i) = out_val;
}
// Handle remaining elements
for (int i = tid * 4 + ((n / 4) * 4); i < n; i += stride) {
out[i] = (x[i] > 0) ? x[i] : alpha * (expf(x[i]) - 1);
}
}
torch::Tensor elu_cuda(torch::Tensor x, float alpha) {
CHECK_INPUT(x);
auto out = torch::empty_like(x);
int n = x.numel();
// Adjust block size to ensure good occupancy and alignment
const int threads = 128;
const int blocks = (n + threads * 4 - 1) / (threads * 4);
elu_kernel_coalesced<<<blocks, threads>>>(x.data_ptr<float>(), out.data_ptr<float>(), alpha, n);
return out;
}
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
m.def("forward", &elu_cuda, "ELU activation (CUDA)");
}
Metric | Value | Unit | Variance | Samples |
---|---|---|---|---|
Executed Ipc Active | 0.522 | inst/cycle | 0.000 | 5 |
Executed Ipc Elapsed | 0.224 | inst/cycle | 0.000 | 5 |
Issue Slots Busy | 14.268 | % | 0.244 | 5 |
Issued Ipc Active | 0.570 | inst/cycle | 0.000 | 5 |
SM Busy | 14.268 | % | 0.244 | 5 |
Memory Throughput | 265700462292.274 | byte/second | 17011397522504777728.000 | 5 |
Mem Busy | 12.574 | % | 0.045 | 5 |
Max Bandwidth | 11.646 | % | 0.042 | 5 |
L1/TEX Hit Rate | 0.000 | % | 0.000 | 5 |
L2 Hit Rate | 67.690 | % | 0.031 | 5 |
Mem Pipes Busy | 6.360 | % | 0.012 | 5 |
Warp Cycles Per Issued Instruction | 23.266 | cycle | 0.019 | 5 |
Warp Cycles Per Executed Instruction | 25.584 | cycle | 0.022 | 5 |
Avg. Active Threads Per Warp | 32.000 | 0.000 | 5 | |
Avg. Not Predicated Off Threads Per Warp | 25.950 | 0.000 | 5 | |
Max Active Clusters | 0.000 | cluster | 0.000 | 5 |
Max Cluster Size | 8.000 | block | 0.000 | 5 |
Overall GPU Occupancy | 0.000 | % | 0.000 | 5 |
Cluster Occupancy | 0.000 | % | 0.000 | 5 |
Block Limit SM | 32.000 | block | 0.000 | 5 |
Block Limit Registers | 16.000 | block | 0.000 | 5 |
Block Limit Shared Mem | 32.000 | block | 0.000 | 5 |
Block Limit Warps | 16.000 | block | 0.000 | 5 |
Theoretical Active Warps per SM | 64.000 | warp | 0.000 | 5 |
Theoretical Occupancy | 100.000 | % | 0.000 | 5 |
Achieved Occupancy | 21.516 | % | 0.014 | 5 |
Achieved Active Warps Per SM | 13.770 | warp | 0.006 | 5 |
Rule | Description |
---|---|
WRN HighPipeUtilization | All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details. |
INF CPIStall | Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason. |
WRN Occupancy | This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (21.4%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy. |
Operation / Metric | Value | Unit |
---|---|---|
aten::to | ||
CPU Time | 691317.33 | μs |
Device Time | 40.13 | μs |
Self CPU Time | 37.65 | μs |
Self Device Time | 0.00 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
aten::_to_copy | ||
CPU Time | 691279.68 | μs |
Device Time | 40.13 | μs |
Self CPU Time | 86.80 | μs |
Self Device Time | 0.00 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
aten::empty_strided | ||
CPU Time | 707456.55 | μs |
Device Time | 0.00 | μs |
Self CPU Time | 16629.18 | μs |
Self Device Time | 0.00 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
cudaDeviceGetStreamPriorityRange | ||
CPU Time | 690626.25 | μs |
Device Time | 0.00 | μs |
Self CPU Time | 690626.25 | μs |
Self Device Time | 0.00 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
cudaLaunchKernel | ||
CPU Time | 409795.96 | μs |
Device Time | 18567.29 | μs |
Self CPU Time | 409795.96 | μs |
Self Device Time | 18567.29 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
elu_kernel_coalesced(float const*, float*, float, int) | ||
CPU Time | 0.00 | μs |
Device Time | 22575.09 | μs |
Self CPU Time | 0.00 | μs |
Self Device Time | 22575.09 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
cudaEventRecord | ||
CPU Time | 18827.38 | μs |
Device Time | 35887.75 | μs |
Self CPU Time | 18827.38 | μs |
Self Device Time | 35887.75 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
aten::zero_ | ||
CPU Time | 56833.48 | μs |
Device Time | 533163.23 | μs |
Self CPU Time | 10075.99 | μs |
Self Device Time | 0.00 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
aten::fill_ | ||
CPU Time | 46758.39 | μs |
Device Time | 533163.23 | μs |
Self CPU Time | 12872.24 | μs |
Self Device Time | 533163.23 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>) | ||
CPU Time | 0.00 | μs |
Device Time | 533242.01 | μs |
Self CPU Time | 0.00 | μs |
Self Device Time | 533242.01 | μs |
CPU Memory Usage | 0 | B |
Device Memory Usage | 0 | B |
Self CPU Memory Usage | 0 | B |
Self Device Memory Usage | 0 | B |
45282 warnings generated when compiling for host. Suppressed 45322 warnings (45275 in non-user code, 47 NOLINT). Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.