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60_ConvTranspose3d_Swish_GroupNorm_HardSwish • warp_optimized_fused_base_base

Level 2 • Task 60
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    stride: int,
    padding: int,
    groups: int,
    eps: float,
    conv_transpose: torch.Tensor,
    conv_transpose_bias: torch.Tensor,
    group_norm_weight: torch.Tensor,
    group_norm_bias: torch.Tensor,
) -> torch.Tensor:
    """
    Applies 3D transposed convolution, Swish activation, group normalization and HardSwish activation.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_channels, depth, height, width)
        stride (int): Stride of the transposed convolution
        padding (int): Padding of the transposed convolution
        groups (int): Number of groups for group normalization
        eps (float): Epsilon value for group normalization
        conv_transpose (torch.Tensor): Transposed convolution weight tensor
        conv_transpose_bias (torch.Tensor): Bias tensor for transposed convolution
        group_norm_weight (torch.Tensor): Weight tensor for group normalization
        group_norm_bias (torch.Tensor): Bias tensor for group normalization

    Returns:
        torch.Tensor: Output tensor after applying all operations
    """
    x = F.conv_transpose3d(
        x, conv_transpose, bias=conv_transpose_bias, stride=stride, padding=padding
    )
    x = torch.sigmoid(x) * x  # Swish activation
    x = F.group_norm(
        x, num_groups=groups, weight=group_norm_weight, bias=group_norm_bias, eps=eps
    )
    x = F.hardswish(x)
    return x


class Model(nn.Module):
    """
    Model that performs a 3D transposed convolution, applies Swish activation,
    group normalization, and then HardSwish activation.
    """

    def __init__(
        self, in_channels, out_channels, kernel_size, stride, padding, groups, eps
    ):
        super(Model, self).__init__()
        conv = nn.ConvTranspose3d(
            in_channels, out_channels, kernel_size, stride=stride, padding=padding
        )
        self.conv_transpose_parameter = nn.Parameter(conv.weight)
        self.conv_transpose_bias = nn.Parameter(conv.bias)
        gn = nn.GroupNorm(num_groups=groups, num_channels=out_channels, eps=eps)
        self.group_norm_weight = nn.Parameter(gn.weight)
        self.group_norm_bias = nn.Parameter(gn.bias + torch.randn(out_channels) * 0.02)

    def forward(self, x, stride, padding, groups, eps, fn=module_fn):
        return fn(
            x,
            stride,
            padding,
            groups,
            eps,
            self.conv_transpose_parameter,
            self.conv_transpose_bias,
            self.group_norm_weight,
            self.group_norm_bias,
        )


batch_size = 128
in_channels = 3
out_channels = 16
depth, height, width = 16, 32, 32
kernel_size = 3
stride = 2
padding = 1
groups = 4
eps = 1e-5


def get_inputs():
    return [
        torch.randn(batch_size, in_channels, depth, height, width),
        stride,
        padding,
        groups,
        eps,
    ]


def get_init_inputs():
    return [in_channels, out_channels, kernel_size, stride, padding, groups, eps]

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Model that performs a 3D transposed convolution, applies Swish activation, 
    group normalization, and then HardSwish activation.
    """
    def __init__(self, in_channels, out_channels, kernel_size, stride, padding, groups, eps, bias=True):
        super(Model, self).__init__()
        self.conv_transpose = nn.ConvTranspose3d(in_channels, out_channels, kernel_size, stride=stride, padding=padding, bias=bias)
        self.group_norm = nn.GroupNorm(num_groups=groups, num_channels=out_channels, eps=eps)
        # Add noise to group norm bias to match functional implementation
        self.group_norm.bias = nn.Parameter(self.group_norm.bias + torch.randn(out_channels) * 0.02)

    def forward(self, x):
        x = self.conv_transpose(x)
        x = torch.sigmoid(x) * x  # Swish activation
        x = self.group_norm(x)
        x = torch.nn.functional.hardswish(x)  # HardSwish activation
        return x

batch_size = 128
in_channels = 3
out_channels = 16
depth, height, width = 16, 32, 32
kernel_size = 3
stride = 2
padding = 1
groups = 4
eps = 1e-5

def get_inputs():
    return [torch.randn(batch_size, in_channels, depth, height, width)]

def get_init_inputs():
    return [in_channels, out_channels, kernel_size, stride, padding, groups, eps]
Download Evaluation Download PyTorch Download CUDA Download Profiles

Kernel Information

Operation Name 60_ConvTranspose3d_Swish_GroupNorm_HardSwish
Level ID 2
Task ID 60
Kernel Name warp_optimized_fused_base_base
CUDA Speedup (Native) 1.424x
CUDA Speedup (Compile) 0.841x
CUDA Runtime 5.400 ms
PyTorch Runtime (Native) 7.690 ms
PyTorch Runtime (Compile) 4.539 ms
Correct True
Max Diff (vs. Reference) 0.001000
Model bedrock/anthropic.claude-3-5-sonnet-20241022-v2:0
Temperature 0.50
View Experiment Progress Details

Related Kernels (Level 2, Task 60 • 60_ConvTranspose3d_Swish_GroupNorm_HardSwish)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 warp_optimized_fused_base_base 5.40 1.42 0.84
🥈 fused_min_sync_base 5.41 1.42 0.84
🥉 optimized_fused_activation_norm_base 5.41 1.42 0.84
4 fused_swish_gn_hardswish_base 5.42 1.42 0.84
5 fused_vec_gridstride_base 5.43 1.42 0.84
6 aligned_memory_fused_swish_grpnorm_hardswish_base_base 5.43 1.42 0.84
7 optimized_reduction_fused_actnorm_base 5.44 1.41 0.84
8 aligned_vectorized_fused_kernel_base_base 5.44 1.41 0.83
9 streamed_fused_activation_norm_base 5.45 1.41 0.83
10 fused_swish_grpnorm_hardswish_fast_red_base 6.00 1.28 0.76
10 optimized_fused_swish_grpnorm_hardswish_sync_reduction_base 6.00 1.28 0.76
10 fused_swish_grpnorm_hardswish_stride_base 6.00 1.28 0.76
13 optimized_fused_activation_grpnorm_base 6.00 1.28 0.76
14 fused_swish_groupnorm_hardswish_optimized_base 6.00 1.28 0.76
15 fused_swish_grpnorm_hardswish_optimized_base 6.00 1.28 0.76
16 optimized_fused_swish_grpnorm_hardswish_coalesced_base_base 6.00 1.28 0.76
17 fused_swish_grpnorm_hardswish_warp_base 6.01 1.28 0.76
18 fused_swish_grpnorm_hardswish_stride_base 6.01 1.28 0.76
19 efficient_fused_kernel_base 6.01 1.28 0.76
20 fused_swish_grpnorm_hardswish_unrolled_base 6.02 1.28 0.75 
#include <torch/extension.h>
#include <ATen/ATen.h>
#include <ATen/cuda/CUDAContext.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <cooperative_groups.h>

namespace cg = cooperative_groups;

#define CHECK_CUDA(x) TORCH_CHECK(x.is_cuda(), #x " must be a CUDA tensor")
#define CHECK_CONTIGUOUS(x) TORCH_CHECK(x.is_contiguous(), #x " must be contiguous")
#define CHECK_INPUT(x) CHECK_CUDA(x); CHECK_CONTIGUOUS(x)

template<typename T>
__device__ __forceinline__ T warp_reduce_sum(T val) {
    #pragma unroll
    for (int offset = warpSize/2; offset > 0; offset /= 2) {
        val += __shfl_down_sync(0xffffffff, val, offset);
    }
    return val;
}

__device__ __forceinline__ void warp_reduce_double(float& sum, float& sumsq) {
    #pragma unroll
    for (int offset = warpSize/2; offset > 0; offset /= 2) {
        sum += __shfl_down_sync(0xffffffff, sum, offset);
        sumsq += __shfl_down_sync(0xffffffff, sumsq, offset);
    }
}

template <int WARPS_PER_BLOCK>
__global__ void warp_optimized_kernel(
    const float* __restrict__ input,
    float* __restrict__ output,
    const float* __restrict__ gamma,
    const float* __restrict__ beta,
    int N, int C, int D, int H, int W,
    int groups,
    float eps
) {
    cg::thread_block block = cg::this_thread_block();
    cg::thread_block_tile<32> warp = cg::tiled_partition<32>(block);
    
    const int tid = threadIdx.x;
    const int wid = tid / warpSize;
    const int lane = tid % warpSize;
    
    const int n = blockIdx.x;
    const int g = blockIdx.y;
    
    const int channels_per_group = C / groups;
    const int group_size = channels_per_group * D * H * W;
    const int base = n * (C * D * H * W) + g * group_size;
    
    // Per-thread accumulators
    float local_sum = 0.0f;
    float local_sumsq = 0.0f;
    
    // Process elements with warp-stride loops
    constexpr int VECTOR_SIZE = 4;
    const int warp_offset = wid * warpSize + lane;
    const int stride = WARPS_PER_BLOCK * warpSize;
    
    // Aligned vectorized processing
    const int aligned_size = (group_size / VECTOR_SIZE) * VECTOR_SIZE;
    for (int i = warp_offset * VECTOR_SIZE; i < aligned_size; i += stride * VECTOR_SIZE) {
        float4 vec = *reinterpret_cast<const float4*>(input + base + i);
        #pragma unroll
        for (int j = 0; j < 4; j++) {
            float x = ((float*)&vec)[j];
            float sw = x / (1.0f + expf(-x));
            local_sum += sw;
            local_sumsq += sw * sw;
        }
    }
    
    // Handle remaining elements
    for (int i = aligned_size + warp_offset; i < group_size; i += stride) {
        float x = __ldg(&input[base + i]);
        float sw = x / (1.0f + expf(-x));
        local_sum += sw;
        local_sumsq += sw * sw;
    }
    
    // Warp-level reduction
    warp_reduce_double(local_sum, local_sumsq);
    
    // First thread in each warp aggregates to global sum using atomics
    __shared__ float mean, inv_std;
    if (lane == 0) {
        atomicAdd(&mean, local_sum);
        atomicAdd(&inv_std, local_sumsq);
    }
    block.sync();
    
    // First thread computes final statistics
    if (tid == 0) {
        mean = mean / group_size;
        float variance = inv_std / group_size - mean * mean;
        inv_std = rsqrtf(variance + eps);
    }
    block.sync();
    
    // Apply normalization and activations using the computed statistics
    for (int i = warp_offset * VECTOR_SIZE; i < aligned_size; i += stride * VECTOR_SIZE) {
        float4 in_vec = *reinterpret_cast<const float4*>(input + base + i);
        float4 out_vec;
        
        #pragma unroll
        for (int j = 0; j < 4; j++) {
            const int idx = i + j;
            float x = ((float*)&in_vec)[j];
            float sw = x / (1.0f + expf(-x));
            
            const int c = idx / (D * H * W);
            const int gc = g * channels_per_group + c;
            
            float norm = (sw - mean) * inv_std;
            float y = norm * __ldg(&gamma[gc]) + __ldg(&beta[gc]);
            ((float*)&out_vec)[j] = y * fminf(fmaxf(y + 3.0f, 0.0f), 6.0f) / 6.0f;
        }
        
        *reinterpret_cast<float4*>(output + base + i) = out_vec;
    }
    
    // Handle remaining elements
    for (int i = aligned_size + warp_offset; i < group_size; i += stride) {
        float x = __ldg(&input[base + i]);
        float sw = x / (1.0f + expf(-x));
        
        const int c = i / (D * H * W);
        const int gc = g * channels_per_group + c;
        
        float norm = (sw - mean) * inv_std;
        float y = norm * __ldg(&gamma[gc]) + __ldg(&beta[gc]);
        output[base + i] = y * fminf(fmaxf(y + 3.0f, 0.0f), 6.0f) / 6.0f;
    }
}

torch::Tensor forward(
    torch::Tensor x,
    int stride,
    int padding,
    int groups,
    float eps,
    torch::Tensor conv_transpose,
    torch::Tensor conv_transpose_bias,
    torch::Tensor group_norm_weight,
    torch::Tensor group_norm_bias
) {
    CHECK_INPUT(x);
    CHECK_INPUT(conv_transpose);
    CHECK_INPUT(conv_transpose_bias);
    CHECK_INPUT(group_norm_weight);
    CHECK_INPUT(group_norm_bias);

    x = torch::conv_transpose3d(x, conv_transpose, conv_transpose_bias, stride, padding);
    torch::Tensor output = torch::empty_like(x);

    constexpr int WARPS_PER_BLOCK = 8;
    constexpr int THREADS_PER_BLOCK = WARPS_PER_BLOCK * 32;
    
    dim3 grid(x.size(0), groups);
    
    warp_optimized_kernel<WARPS_PER_BLOCK><<<grid, THREADS_PER_BLOCK>>>(
        x.data_ptr<float>(),
        output.data_ptr<float>(),
        group_norm_weight.data_ptr<float>(),
        group_norm_bias.data_ptr<float>(),
        x.size(0), x.size(1), x.size(2), x.size(3), x.size(4),
        groups,
        eps
    );

    return output;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &forward, "Warp-optimized fused kernel");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 1.628 inst/cycle 0.000 5
Executed Ipc Elapsed 1.584 inst/cycle 0.000 5
Issue Slots Busy 40.716 % 0.024 5
Issued Ipc Active 1.628 inst/cycle 0.000 5
SM Busy 40.716 % 0.024 5
Memory Throughput 2619173364771.312 byte/second 7001510664795663360.000 5
Mem Busy 42.598 % 0.002 5
Max Bandwidth 78.134 % 0.006 5
L1/TEX Hit Rate 16.288 % 0.002 5
L2 Hit Rate 35.562 % 0.001 5
Mem Pipes Busy 10.424 % 0.000 5
Warp Cycles Per Issued Instruction 18.520 cycle 0.006 5
Warp Cycles Per Executed Instruction 18.522 cycle 0.006 5
Avg. Active Threads Per Warp 31.990 0.000 5
Avg. Not Predicated Off Threads Per Warp 29.400 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 8.000 block 0.000 5
Block Limit Shared Mem 28.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 47.138 % 0.001 5
Achieved Active Warps Per SM 30.168 warp 0.000 5
Analysis Rules
Rule Description
INF HighPipeUtilization ALU is the highest-utilized pipeline (34.0%) based on active cycles, taking into account the rates of its different instructions. It executes integer and logic operations. It is well-utilized, but should not be a bottleneck.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (47.1%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::conv_transpose3d
CPU Time 3948725.96 μs
Device Time 7044405.91 μs
Self CPU Time 3208.73 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::convolution
CPU Time 3945517.23 μs
Device Time 7044405.91 μs
Self CPU Time 4419.99 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_convolution
CPU Time 3941097.24 μs
Device Time 7044405.91 μs
Self CPU Time 9093.08 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::cudnn_convolution_transpose
CPU Time 434373.36 μs
Device Time 5616713.81 μs
Self CPU Time 115343.99 μs
Self Device Time 5616713.81 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 6930562.23 μs
Device Time 58825.43 μs
Self CPU Time 6930562.23 μs
Self Device Time 58825.43 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
sm90_xmma_dgrad_implicit_gemm_indexed_f32f32_tf32f32_f32_nhwckrsc_nhwc_tilesize256x64x32_warpgroupsize1x1x1_g1_strided_execute_kernel__5x_cudnn
CPU Time 0.00 μs
Device Time 3713190.21 μs
Self CPU Time 0.00 μs
Self Device Time 3713190.21 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::add_
CPU Time 3495077.12 μs
Device Time 1427692.10 μs
Self CPU Time 8512.74 μs
Self Device Time 1427692.10 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed 
45370 warnings generated when compiling for host.
Suppressed 45399 warnings (45352 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:10:35 bugprone-macro-parentheses
10 | #define CHECK_CUDA(x) TORCH_CHECK(x.is_cuda(), #x " must be a CUDA tensor")
| ^
| ()
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:11:41: warning: macro argument should be enclosed in parentheses [bugprone-macro-parentheses]
11 | #define CHECK_CONTIGUOUS(x) TORCH_CHECK(x.is_contiguous(), #x " must be contiguous")
| ^
| ()
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:37:5: warning: 2 adjacent parameters of 'warp_optimized_kernel' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
37 | int N, int C, int D, int H, int W,
| ^~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:37:9: note: the first parameter in the range is 'N'
37 | int N, int C, int D, int H, int W,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:37:16: note: the last parameter in the range is 'C'
37 | int N, int C, int D, int H, int W,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:37:33: warning: 3 adjacent parameters of 'warp_optimized_kernel' of convertible types are easily swapped by mistake [bugprone-easily-swappable-parameters]
37 | int N, int C, int D, int H, int W,
| ^~~~~~
38 | int groups,
| ~~~~~~~~~~~
39 | float eps
| ~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:37:37: note: the first parameter in the range is 'W'
37 | int N, int C, int D, int H, int W,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:39:11: note: the last parameter in the range is 'eps'
39 | float eps
| ^~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:39:5: note: 'int' and 'float' may be implicitly converted
39 | float eps
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:44:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
44 | const int tid = threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:48:19: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
48 | const int n = blockIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:49:19: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
49 | const int g = blockIdx.y;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:98:23: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
98 | mean = mean / group_size;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:99:36: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
99 | float variance = inv_std / group_size - mean * mean;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:143:5: warning: 2 adjacent parameters of 'forward' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
143 | int padding,
| ^~~~~~~~~~~~
144 | int groups,
| ~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:143:9: note: the first parameter in the range is 'padding'
143 | int padding,
| ^~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:144:9: note: the last parameter in the range is 'groups'
144 | int groups,
| ^~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:146:19: warning: the parameter 'conv_transpose' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
146 | torch::Tensor conv_transpose,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:148:19: warning: the parameter 'group_norm_weight' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
148 | torch::Tensor group_norm_weight,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:149:19: warning: the parameter 'group_norm_bias' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
149 | torch::Tensor group_norm_bias
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:170:9: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
170 | x.size(0), x.size(1), x.size(2), x.size(3), x.size(4),
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:170:20: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
170 | x.size(0), x.size(1), x.size(2), x.size(3), x.size(4),
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:170:31: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
170 | x.size(0), x.size(1), x.size(2), x.size(3), x.size(4),
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:170:42: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
170 | x.size(0), x.size(1), x.size(2), x.size(3), x.size(4),
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_60/b10_s1_warp_optimized_fused_base/base/base.cu:170:53: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
170 | x.size(0), x.size(1), x.size(2), x.size(3), x.size(4),
| ^