Kernel Details - fused_warp_groupnorm

import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    conv_weight: torch.Tensor,
    conv_bias: torch.Tensor,
    bias: torch.Tensor,
    scale: torch.Tensor,
    group_norm_weight: torch.Tensor,
    group_norm_bias: torch.Tensor,
    num_groups: int,
) -> torch.Tensor:
    """
    Applies convolution, bias addition, scaling, sigmoid activation and group normalization.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_channels, height, width)
        conv_weight (torch.Tensor): Convolution weight tensor
        conv_bias (torch.Tensor): Convolution bias tensor
        bias (torch.Tensor): Bias tensor for addition
        scale (torch.Tensor): Scale tensor for multiplication
        group_norm_weight (torch.Tensor): Group norm weight tensor
        group_norm_bias (torch.Tensor): Group norm bias tensor
        num_groups (int): Number of groups for group normalization

    Returns:
        torch.Tensor: Output tensor after applying convolution, bias, scale, sigmoid and group norm
    """
    x = F.conv2d(x, conv_weight, bias=conv_bias)
    x = x + bias
    x = x * scale
    x = torch.sigmoid(x)
    x = F.group_norm(x, num_groups, group_norm_weight, group_norm_bias)
    return x


class Model(nn.Module):
    """
    Model that performs a convolution, adds a bias term, scales, applies sigmoid, and performs group normalization.
    """

    def __init__(
        self,
        in_channels,
        out_channels,
        kernel_size,
        num_groups,
        bias_shape,
        scale_shape,
    ):
        super(Model, self).__init__()
        conv = nn.Conv2d(in_channels, out_channels, kernel_size)
        self.conv_weight = conv.weight
        self.conv_bias = nn.Parameter(
            conv.bias + torch.ones_like(conv.bias) * 0.02
        )  # make sure its nonzero
        self.bias = nn.Parameter(torch.randn(bias_shape) * 0.02)
        self.scale = nn.Parameter(torch.randn(scale_shape) * 0.02)
        group_norm = nn.GroupNorm(num_groups, out_channels)
        self.group_norm_weight = group_norm.weight
        self.group_norm_bias = nn.Parameter(
            group_norm.bias + torch.ones_like(group_norm.bias) * 0.02
        )  # make sure its nonzero

    def forward(self, x, num_groups, fn=module_fn):
        return fn(
            x,
            self.conv_weight,
            self.conv_bias,
            self.bias,
            self.scale,
            self.group_norm_weight,
            self.group_norm_bias,
            num_groups,
        )


batch_size = 128
in_channels = 3
out_channels = 16
height, width = 32, 32
kernel_size = 3
num_groups = 8
bias_shape = (out_channels, 1, 1)
scale_shape = (out_channels, 1, 1)


def get_inputs():
    return [torch.randn(batch_size, in_channels, height, width), num_groups]


def get_init_inputs():
    return [in_channels, out_channels, kernel_size, num_groups, bias_shape, scale_shape]

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Model that performs a convolution, adds a bias term, scales, applies sigmoid, and performs group normalization.
    """
    def __init__(self, in_channels, out_channels, kernel_size, num_groups, bias_shape, scale_shape):
        super(Model, self).__init__()
        self.conv = nn.Conv2d(in_channels, out_channels, kernel_size)
        self.conv.bias = nn.Parameter(self.conv.bias + torch.ones_like(self.conv.bias) * 0.02)
        self.bias = nn.Parameter(torch.randn(bias_shape)*0.02) 
        self.scale = nn.Parameter(torch.randn(scale_shape)*0.02)
        self.group_norm = nn.GroupNorm(num_groups, out_channels)
        self.group_norm.bias = nn.Parameter(self.group_norm.bias + torch.ones_like(self.group_norm.bias) * 0.02)

    def forward(self, x):
        x = self.conv(x)
        x = x + self.bias
        x = x * self.scale
        x = torch.sigmoid(x)
        x = self.group_norm(x)
        return x

batch_size = 128
in_channels = 3
out_channels = 16
height, width = 32, 32
kernel_size = 3
num_groups = 8
bias_shape = (out_channels, 1, 1)
scale_shape = (out_channels, 1, 1)

def get_inputs():
    return [torch.randn(batch_size, in_channels, height, width)]

def get_init_inputs():
    return [in_channels, out_channels, kernel_size, num_groups, bias_shape, scale_shape]

Download Evaluation Download PyTorch Download CUDA Download Profiles

Kernel Information

Operation Name	21_Conv2d_Add_Scale_Sigmoid_GroupNorm
Level ID	2
Task ID	21
Kernel Name	fused_warp_groupnorm_base
CUDA Speedup (Native)	1.704x
CUDA Speedup (Compile)	1.459x
CUDA Runtime	0.044 ms
PyTorch Runtime (Native)	0.075 ms
PyTorch Runtime (Compile)	0.064 ms
Correct	True
Max Diff (vs. Reference)	0.008000
Model	o3-mini-2025-01-31
Temperature	1.00

View Experiment Progress Details

Related Kernels (Level 2, Task 21 • 21_Conv2d_Add_Scale_Sigmoid_GroupNorm)

Rank	Kernel Name	Runtime (ms)	Speedup Native	Speedup Compile
🥇	shared_memory_coalesced_access_kernel_base	0.04	1.79	1.53
🥈	fused_elem_groupnorm_reduced_sync_base_base	0.04	1.74	1.49
🥈	fused_optimized_warp_base	0.04	1.74	1.49
🥈	optimized_memory_access_kernel_base	0.04	1.74	1.49
🥈	atomic_optimized_kernel_base_base	0.04	1.74	1.49
🥈	optimized_memory_access_kernel_base	0.04	1.74	1.49
🥈	optimized_fused_kernel_base	0.04	1.74	1.49
8	fused_warp_reduce_groupnorm_base	0.04	1.70	1.46
8	fused_warp_groupnorm_base	0.04	1.70	1.46
8	shared_memory_reuse_kernel_base	0.04	1.70	1.46
8	fused_lockfree_groupnorm_base_base	0.04	1.70	1.46
8	fused_stride_kernel_base	0.04	1.70	1.46
8	fused_elem_groupnorm_no_atomic_base	0.04	1.70	1.46
8	fused_elem_groupnorm_min_sync_base_base	0.04	1.70	1.46
8	unrolled_fused_kernel_base_base	0.04	1.70	1.46
16	optimized_modular_kernel_base	0.04	1.67	1.43
16	fused_strided_groupnorm_base_base	0.04	1.67	1.43
18	fused_sigmoid_groupnorm_base	0.05	1.63	1.40
19	fused_sigmoid_groupnorm_base	0.05	1.60	1.37
19	block_size_optimized_kernel_base_base	0.05	1.60	1.37

/*
This fused CUDA kernel performs bias addition, scaling, sigmoid activation,
and group normalization in a single kernel launch using warp-level reductions
for efficient computation of group statistics.
*/

#include <torch/extension.h>
#include <ATen/ATen.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <math.h>

#define CHECK_CUDA(x) TORCH_CHECK(x.is_cuda(), #x " must be a CUDA tensor.")
#define CHECK_CONTIGUOUS(x) TORCH_CHECK(x.is_contiguous(), #x " must be contiguous.")
#define CHECK_INPUT(x) CHECK_CUDA(x); CHECK_CONTIGUOUS(x)

// Fused kernel using warp-level reduction for group normalization
__global__ void fused_warp_groupnorm_kernel(
    const float* __restrict__ x,    // input tensor from conv2d [N, C, H, W]
    float* __restrict__ y,          // output tensor [N, C, H, W]
    const float* __restrict__ bias, // bias for elementwise op (size 1 or C)
    const float* __restrict__ scale,// scale for elementwise op (size 1 or C)
    const float* __restrict__ gn_weight, // group norm weight (gamma), shape [C]
    const float* __restrict__ gn_bias,   // group norm bias (beta),  shape [C]
    int N, int C, int H, int W,
    int num_groups,
    bool bias_broadcast,
    bool scale_broadcast,
    float eps) {

    // Each block processes one group of one sample
    int sample_idx = blockIdx.x / num_groups;
    int group_idx  = blockIdx.x % num_groups;
    int channels_per_group = C / num_groups;
    int group_size = channels_per_group * H * W;  // total elements in the group

    int sample_offset = sample_idx * C * H * W;
    int group_channel_offset = group_idx * channels_per_group;

    // First pass: elementwise computation and accumulation for reduction
    float local_sum = 0.0f;
    float local_sum_sq = 0.0f;

    // Loop over the elements in this group, using grid-stride style for potential large groups
    for (int i = threadIdx.x; i < group_size; i += blockDim.x) {
        int c_local = i / (H * W);
        int hw = i % (H * W);
        int c = group_channel_offset + c_local;
        int idx = sample_offset + c * (H * W) + hw;

        float in_val = x[idx];
        float b_val = bias_broadcast ? bias[0] : bias[c];
        float s_val = scale_broadcast  ? scale[0]  : scale[c];
        float pre_act = (in_val + b_val) * s_val;
        // Sigmoid activation
        float activated = 1.0f / (1.0f + expf(-pre_act));

        // Write intermediate result
        y[idx] = activated;

        local_sum    += activated;
        local_sum_sq += activated * activated;
    }

    // Warp-level reduction for each thread's partial sum
    unsigned int mask = 0xffffffff;
    for (int offset = warpSize / 2; offset > 0; offset /= 2) {
        local_sum    += __shfl_down_sync(mask, local_sum, offset);
        local_sum_sq += __shfl_down_sync(mask, local_sum_sq, offset);
    }

    // Use shared memory to collect sums from each warp
    extern __shared__ float sdata[]; // sdata[0..num_warps-1] for sum, [num_warps..2*num_warps-1] for sum_sq
    int warpId = threadIdx.x / warpSize;
    int lane = threadIdx.x % warpSize;
    int num_warps = (blockDim.x + warpSize - 1) / warpSize;
    if (lane == 0) {
        sdata[warpId] = local_sum;
        sdata[num_warps + warpId] = local_sum_sq;
    }
    __syncthreads();

    float group_sum = 0.0f;
    float group_sum_sq = 0.0f;
    if (threadIdx.x == 0) {
        for (int i = 0; i < num_warps; i++) {
            group_sum    += sdata[i];
            group_sum_sq += sdata[num_warps + i];
        }
        // Store final results back in shared memory for all threads
        sdata[0] = group_sum;
        sdata[1] = group_sum_sq;
    }
    __syncthreads();

    group_sum    = sdata[0];
    group_sum_sq = sdata[1];

    // Compute mean and variance
    float mean = group_sum / group_size;
    float var  = group_sum_sq / group_size - mean * mean;
    float inv_std = 1.0f / sqrtf(var + eps);

    // Second pass: normalize and apply group norm affine transform
    for (int i = threadIdx.x; i < group_size; i += blockDim.x) {
        int c_local = i / (H * W);
        int hw = i % (H * W);
        int c = group_channel_offset + c_local;
        int idx = sample_offset + c * (H * W) + hw;

        float activated = y[idx];
        float normalized = (activated - mean) * inv_std;
        float gamma = gn_weight[c];
        float beta  = gn_bias[c];
        y[idx] = gamma * normalized + beta;
    }
}

// Launcher for the fused kernel
void fused_warp_groupnorm_cuda(
    at::Tensor x,          // Input tensor from conv2d
    at::Tensor bias,       // Bias for elementwise op
    at::Tensor scale,      // Scale for elementwise op
    at::Tensor y,          // Output tensor
    at::Tensor gn_weight,  // Group normalization weight (gamma)
    at::Tensor gn_bias,    // Group normalization bias (beta)
    int64_t num_groups,
    bool bias_broadcast,
    bool scale_broadcast,
    float eps) {

    int N = x.size(0);
    int C = x.size(1);
    int H = x.size(2);
    int W = x.size(3);

    // Launch one block per (sample, group)
    int total_blocks = N * num_groups;
    int threads = 256;  // Preferred threads per block
    int num_warps = (threads + 31) / 32;
    size_t shared_mem_size = num_warps * 2 * sizeof(float);

    fused_warp_groupnorm_kernel<<<total_blocks, threads, shared_mem_size>>>(
        x.data_ptr<float>(),
        y.data_ptr<float>(),
        bias.data_ptr<float>(),
        scale.data_ptr<float>(),
        gn_weight.data_ptr<float>(),
        gn_bias.data_ptr<float>(),
        N, C, H, W,
        num_groups,
        bias_broadcast,
        scale_broadcast,
        eps);

    cudaError_t err = cudaGetLastError();
    TORCH_CHECK(err == cudaSuccess, "CUDA kernel failed : ", cudaGetErrorString(err));
}

// Forward function that fuses convolution, elementwise operations, and group normalization
at::Tensor module_fn_forward(
    at::Tensor x,
    at::Tensor conv_weight,
    at::Tensor conv_bias,
    at::Tensor bias,
    at::Tensor scale,
    at::Tensor gn_weight,
    at::Tensor gn_bias,
    int64_t num_groups) {

    CHECK_INPUT(x);
    CHECK_INPUT(conv_weight);
    if (conv_bias.defined()) CHECK_INPUT(conv_bias);
    CHECK_INPUT(bias);
    CHECK_INPUT(scale);
    CHECK_INPUT(gn_weight);
    CHECK_INPUT(gn_bias);

    // Convolution
    x = at::conv2d(x, conv_weight, conv_bias);

    // Prepare output tensor
    at::Tensor y = at::empty_like(x);

    bool bias_broadcast = (bias.numel() == 1);
    bool scale_broadcast = (scale.numel() == 1);
    float eps = 1e-5f;

    // Launch the fused kernel
    fused_warp_groupnorm_cuda(x, bias, scale, y, gn_weight, gn_bias,
                              num_groups, bias_broadcast, scale_broadcast, eps);

    return y;
}

// Pybind11 binding
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &module_fn_forward, "Fused warp-level elementwise and group normalization kernel (CUDA)");
}

Performance Metrics

Metric	Value	Unit	Variance	Samples
Executed Ipc Active	2.378	inst/cycle	0.000	5
Executed Ipc Elapsed	1.898	inst/cycle	0.000	5
Issue Slots Busy	59.578	%	0.293	5
Issued Ipc Active	2.382	inst/cycle	0.000	5
SM Busy	59.578	%	0.293	5
Memory Throughput	481842999626.782	byte/second	21994569507874344960.000	5
Mem Busy	22.978	%	0.036	5
Max Bandwidth	28.012	%	0.073	5
L1/TEX Hit Rate	65.572	%	0.001	5
L2 Hit Rate	70.560	%	0.002	5
Mem Pipes Busy	18.724	%	0.032	5
Warp Cycles Per Issued Instruction	19.734	cycle	0.001	5
Warp Cycles Per Executed Instruction	19.788	cycle	0.001	5
Avg. Active Threads Per Warp	30.920		0.000	5
Avg. Not Predicated Off Threads Per Warp	27.820		0.000	5
Max Active Clusters	0.000	cluster	0.000	5
Max Cluster Size	8.000	block	0.000	5
Overall GPU Occupancy	0.000	%	0.000	5
Cluster Occupancy	0.000	%	0.000	5
Block Limit SM	32.000	block	0.000	5
Block Limit Registers	8.000	block	0.000	5
Block Limit Shared Mem	28.000	block	0.000	5
Block Limit Warps	8.000	block	0.000	5
Theoretical Active Warps per SM	64.000	warp	0.000	5
Theoretical Occupancy	100.000	%	0.000	5
Achieved Occupancy	74.380	%	0.130	5
Achieved Active Warps Per SM	47.604	warp	0.053	5

Analysis Rules

Rule	Description
INF HighPipeUtilization	ALU is the highest-utilized pipeline (46.2%) based on active cycles, taking into account the rates of its different instructions. It executes integer and logic operations. It is well-utilized, but should not be a bottleneck.
INF CPIStall	Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy	This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (75.0%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.

Operation / Metric	Value	Unit
aten::fill_
CPU Time	156673.42	μs
Device Time	1098808.59	μs
Self CPU Time	32176.58	μs
Self Device Time	1098808.59	μs
CPU Memory Usage	0	B
Device Memory Usage	0	B
Self CPU Memory Usage	0	B
Self Device Memory Usage	0	B
aten::zero_
CPU Time	181132.51	μs
Device Time	1098808.59	μs
Self CPU Time	24473.92	μs
Self Device Time	0.00	μs
CPU Memory Usage	0	B
Device Memory Usage	0	B
Self CPU Memory Usage	0	B
Self Device Memory Usage	0	B
aten::conv2d
CPU Time	1202592.43	μs
Device Time	389471.55	μs
Self CPU Time	22758.82	μs
Self Device Time	0.00	μs
CPU Memory Usage	0	B
Device Memory Usage	0	B
Self CPU Memory Usage	0	B
Self Device Memory Usage	0	B
aten::convolution
CPU Time	1179833.61	μs
Device Time	389471.55	μs
Self CPU Time	27641.01	μs
Self Device Time	0.00	μs
CPU Memory Usage	0	B
Device Memory Usage	0	B
Self CPU Memory Usage	0	B
Self Device Memory Usage	0	B
aten::_convolution
CPU Time	1152192.60	μs
Device Time	389471.55	μs
Self CPU Time	57686.31	μs
Self Device Time	0.00	μs
CPU Memory Usage	0	B
Device Memory Usage	0	B
Self CPU Memory Usage	0	B
Self Device Memory Usage	0	B
aten::cudnn_convolution
CPU Time	963369.64	μs
Device Time	279615.15	μs
Self CPU Time	218385.06	μs
Self Device Time	279595.12	μs
CPU Memory Usage	0	B
Device Memory Usage	0	B
Self CPU Memory Usage	0	B
Self Device Memory Usage	0	B
cudaLaunchKernel
CPU Time	972407.24	μs
Device Time	28552.94	μs
Self CPU Time	972407.24	μs
Self Device Time	28552.94	μs
CPU Memory Usage	0	B
Device Memory Usage	0	B
Self CPU Memory Usage	0	B
Self Device Memory Usage	0	B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char, 1>)
CPU Time	0.00	μs
Device Time	1098808.59	μs
Self CPU Time	0.00	μs
Self Device Time	1098808.59	μs
CPU Memory Usage	0	B
Device Memory Usage	0	B
Self CPU Memory Usage	0	B
Self Device Memory Usage	0	B

Status: Completed

45315 warnings generated when compiling for host.
Suppressed 45328 warnings (45281 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.

/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_21/b4_s2_fused_warp_groupnorm/base/base.cu:13:35 bugprone-macro-parentheses

13 | #define CHECK_CUDA(x) TORCH_CHECK(x.is_cuda(), #x " must be a CUDA tensor.")

| ^

| ()

/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_21/b4_s2_fused_warp_groupnorm/base/base.cu:14:41: warning: macro argument should be enclosed in parentheses [bugprone-macro-parentheses]

14 | #define CHECK_CONTIGUOUS(x) TORCH_CHECK(x.is_contiguous(), #x " must be contiguous.")

| ^

| ()

/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_21/b4_s2_fused_warp_groupnorm/base/base.cu:21:5: warning: 4 adjacent parameters of 'fused_warp_groupnorm_kernel' of similar type ('const float *__restrict') are easily swapped by mistake [bugprone-easily-swappable-parameters]

21 | const float* __restrict__ bias, // bias for elementwise op (size 1 or C)

| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

22 | const float* __restrict__ scale,// scale for elementwise op (size 1 or C)

| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

23 | const float* __restrict__ gn_weight, // group norm weight (gamma), shape [C]

| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

24 | const float* __restrict__ gn_bias, // group norm bias (beta), shape [C]

| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_21/b4_s2_fused_warp_groupnorm/base/base.cu:21:31: note: the first parameter in the range is 'bias'

21 | const float* __restrict__ bias, // bias for elementwise op (size 1 or C)

| ^~~~

/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_21/b4_s2_fused_warp_groupnorm/base/base.cu:24:31: note: the last parameter in the range is 'gn_bias'

24 | const float* __restrict__ gn_bias, // group norm bias (beta), shape [C]

| ^~~~~~~

/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_21/b4_s2_fused_warp_groupnorm/base/base.cu:25:5: warning: 2 adjacent parameters of 'fused_warp_groupnorm_kernel' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]