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68_Matmul_Min_Subtract • stride_loop_optimization_thread_base_base

Level 2 • Task 68
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    linear_weight: torch.Tensor,
    linear_bias: torch.Tensor,
    constant: torch.Tensor,
) -> torch.Tensor:
    """
    Performs matrix multiplication, applies minimum with constant, and subtracts constant.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_features)
        linear_weight (torch.Tensor): Weight matrix of shape (out_features, in_features)
        linear_bias (torch.Tensor): Bias vector of shape (out_features)
        constant (torch.Tensor): Scalar constant tensor

    Returns:
        torch.Tensor: Output tensor of shape (batch_size, out_features)
    """
    x = F.linear(x, linear_weight, linear_bias)
    x = torch.min(x, constant)
    x = x - constant
    return x


class Model(nn.Module):
    """
    Simple model that performs a matrix multiplication, applies minimum, and subtracts a constant.
    """

    def __init__(self, in_features, out_features, constant):
        super(Model, self).__init__()
        gemm = nn.Linear(in_features, out_features)
        self.linear_weight = nn.Parameter(gemm.weight)
        self.linear_bias = nn.Parameter(gemm.bias)
        self.constant = nn.Parameter(torch.tensor(constant))

    def forward(self, x, fn=module_fn):
        return fn(x, self.linear_weight, self.linear_bias, self.constant)


batch_size = 128
in_features = 10
out_features = 5
constant = 2.0


def get_inputs():
    return [torch.randn(batch_size, in_features)]


def get_init_inputs():
    return [in_features, out_features, constant]

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Simple model that performs a matrix multiplication, applies minimum, and subtracts a constant.
    """
    def __init__(self, in_features, out_features, constant):
        super(Model, self).__init__()
        self.linear = nn.Linear(in_features, out_features)
        self.constant = nn.Parameter(torch.tensor(constant))

    def forward(self, x):
        x = self.linear(x)
        x = torch.min(x, self.constant)
        x = x - self.constant
        return x

batch_size = 128
in_features = 10
out_features = 5
constant = 2.0

def get_inputs():
    return [torch.randn(batch_size, in_features)]

def get_init_inputs():
    return [in_features, out_features, constant]
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Kernel Information

Operation Name 68_Matmul_Min_Subtract
Level ID 2
Task ID 68
Kernel Name stride_loop_optimization_thread_base_base
CUDA Speedup (Native) 2.947x
CUDA Speedup (Compile) 1.920x
CUDA Runtime 0.008 ms
PyTorch Runtime (Native) 0.024 ms
PyTorch Runtime (Compile) 0.015 ms
Correct True
Max Diff (vs. Reference) 0.000000
Model azure-gpt-4o-2024-08-06
Temperature 1.00
View Experiment Progress Details

Related Kernels (Level 2, Task 68 • 68_Matmul_Min_Subtract)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 optimized_shared_memory_sync_base 0.01 2.95 1.92
🥇 optimized_thread_block_indexing_base_base 0.01 2.95 1.92
🥇 modularized_device_functions_base_base 0.01 2.95 1.92
🥇 aligned_memory_access_ldg_base_base 0.01 2.95 1.92
🥇 stride_loop_optimization_thread_base_base 0.01 2.95 1.92
🥇 tiled_shared_memory_matmul_base_base 0.01 2.95 1.92
🥇 unrolled_loop_optimization_base 0.01 2.95 1.92
🥇 optimized_warp_coalesced_base 0.01 2.95 1.92
🥇 grid_2d_mapping_base 0.01 2.95 1.92
🥇 aligned_memory_access_base_edit_1 0.01 2.95 1.92
🥇 modular_device_functions_edit_1 0.01 2.95 1.92
🥇 aligned_memory_access_base_base 0.01 2.95 1.92
🥇 grid_2d_mapping_edit_1 0.01 2.95 1.92
🥇 efficient_thread_block_mapping_base 0.01 2.95 1.92
🥇 stride_loop_optimization_base_base 0.01 2.95 1.92
🥇 tiled_gemm_thread_mapping_base 0.01 2.95 1.92
17 modular_device_functions_base 0.01 2.62 1.71
17 aligned_ldg_vectorized_edit_1 0.01 2.62 1.71
17 aligned_ldg_vectorized_base 0.01 2.62 1.71
17 branchless_min_dot_edit_1 0.01 2.62 1.71 
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>

#define THREADS_PER_BLOCK 256

__global__ void my_kernel(
    const float* x,
    const float* linear_weight,
    const float* linear_bias,
    const float* constant,
    float* y,
    int batch_size,
    int in_features,
    int out_features) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    int total_elements = batch_size * out_features;

    for (int i = idx; i < total_elements; i += blockDim.x * gridDim.x) {
        int batch_idx = i / out_features;
        int out_idx = i % out_features;

        float sum = 0.0f;
        for (int j = 0; j < in_features; ++j) {
            sum += x[batch_idx * in_features + j] * linear_weight[out_idx * in_features + j];
        }

        float result = sum + linear_bias[out_idx];
        float c = *constant;
        result = (result > c) ? c : result;
        y[batch_idx * out_features + out_idx] = result - c;
    }
}

torch::Tensor forward(
    torch::Tensor x,
    torch::Tensor linear_weight,
    torch::Tensor linear_bias,
    torch::Tensor constant) {
    TORCH_CHECK(x.is_cuda(), "x must be a CUDA tensor");
    TORCH_CHECK(linear_weight.is_cuda(), "linear_weight must be a CUDA tensor");
    TORCH_CHECK(linear_bias.is_cuda(), "linear_bias must be a CUDA tensor");
    TORCH_CHECK(constant.is_cuda(), "constant must be a CUDA tensor");

    int batch_size = x.size(0);
    int in_features = x.size(1);
    int out_features = linear_weight.size(0);

    auto y = torch::zeros({batch_size, out_features}, x.options());

    const float* x_ptr = x.data_ptr<float>();
    const float* weight_ptr = linear_weight.data_ptr<float>();
    const float* bias_ptr = linear_bias.data_ptr<float>();
    const float* constant_ptr = constant.data_ptr<float>();
    float* y_ptr = y.data_ptr<float>();

    int total_elements = batch_size * out_features;
    int blocks = (total_elements + THREADS_PER_BLOCK - 1) / THREADS_PER_BLOCK;

    my_kernel<<<blocks, THREADS_PER_BLOCK>>>(
        x_ptr,
        weight_ptr,
        bias_ptr,
        constant_ptr,
        y_ptr,
        batch_size,
        in_features,
        out_features);

    return y;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &forward, "CUDA forward function");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.297 inst/cycle 0.000 3
Executed Ipc Elapsed 0.000 inst/cycle 0.000 3
Issue Slots Busy 7.787 % 0.005 3
Issued Ipc Active 0.310 inst/cycle 0.000 3
SM Busy 7.787 % 0.005 3
Memory Throughput 2898409133.447 byte/second 6492054039135499.000 3
Mem Busy 7.543 % 0.052 3
Max Bandwidth 3.930 % 0.008 3
L1/TEX Hit Rate 89.410 % 0.000 3
L2 Hit Rate 102.390 % 0.204 3
Mem Pipes Busy 0.063 % 0.000 3
Warp Cycles Per Issued Instruction 22.233 cycle 0.241 3
Warp Cycles Per Executed Instruction 23.307 cycle 0.265 3
Avg. Active Threads Per Warp 32.000 0.000 3
Avg. Not Predicated Off Threads Per Warp 28.860 0.000 3
Max Active Clusters 0.000 cluster 0.000 3
Max Cluster Size 8.000 block 0.000 3
Overall GPU Occupancy 0.000 % 0.000 3
Cluster Occupancy 0.000 % 0.000 3
Block Limit SM 32.000 block 0.000 3
Block Limit Registers 8.000 block 0.000 3
Block Limit Shared Mem 32.000 block 0.000 3
Block Limit Warps 8.000 block 0.000 3
Theoretical Active Warps per SM 64.000 warp 0.000 3
Theoretical Occupancy 100.000 % 0.000 3
Achieved Occupancy 11.033 % 0.007 3
Achieved Active Warps Per SM 7.063 warp 0.003 3
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (11.1%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::zeros
CPU Time 5964790.91 μs
Device Time 223458.22 μs
Self CPU Time 157481.75 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 6300752.66 μs
Device Time 8019852.08 μs
Self CPU Time 324942.40 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 5975811.72 μs
Device Time 8019852.08 μs
Self CPU Time 412120.54 μs
Self Device Time 8019852.08 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 5940949.62 μs
Device Time 3010.41 μs
Self CPU Time 5940949.62 μs
Self Device Time 3010.41 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
my_kernel(float const*, float const*, float const*, float const*, float*, int, int, int)
CPU Time 0.00 μs
Device Time 367348.47 μs
Self CPU Time 0.00 μs
Self Device Time 367348.47 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaEventRecord
CPU Time 277431.67 μs
Device Time 1293146.60 μs
Self CPU Time 277431.67 μs
Self Device Time 1293146.60 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 7797342.34 μs
Self CPU Time 0.00 μs
Self Device Time 7797342.34 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaEventElapsedTime
CPU Time 358214.82 μs
Device Time 0.00 μs
Self CPU Time 358214.82 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed 
45288 warnings generated when compiling for host.
Suppressed 45324 warnings (45277 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:9:5 bugprone-easily-swappable-parameters
9 | const float* linear_weight,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
10 | const float* linear_bias,
| ~~~~~~~~~~~~~~~~~~~~~~~~~
11 | const float* constant,
| ~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:9:18: note: the first parameter in the range is 'linear_weight'
9 | const float* linear_weight,
| ^~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:11:18: note: the last parameter in the range is 'constant'
11 | const float* constant,
| ^~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:13:5: warning: 2 adjacent parameters of 'my_kernel' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
13 | int batch_size,
| ^~~~~~~~~~~~~~~
14 | int in_features,
| ~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:13:9: note: the first parameter in the range is 'batch_size'
13 | int batch_size,
| ^~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:14:9: note: the last parameter in the range is 'in_features'
14 | int in_features,
| ^~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:16:15: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
16 | int idx = blockIdx.x * blockDim.x + threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:19:48: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
19 | for (int i = idx; i < total_elements; i += blockDim.x * gridDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:36:19: warning: the parameter 'x' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
36 | torch::Tensor x,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:37:19: warning: the parameter 'linear_weight' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
37 | torch::Tensor linear_weight,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:38:19: warning: the parameter 'linear_bias' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
38 | torch::Tensor linear_bias,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:39:19: warning: the parameter 'constant' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
39 | torch::Tensor constant) {
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:45:22: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
45 | int batch_size = x.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:46:23: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
46 | int in_features = x.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_68/b9_s1_stride_loop_optimization_thread_base/base/base.cu:47:24: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
47 | int out_features = linear_weight.size(0);
| ^