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33_VanillaRNN • modular_warp_rnn_base

Level 3 • Task 33
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    i2h_weight: torch.Tensor,
    i2h_bias: torch.Tensor,
    h2o_weight: torch.Tensor,
    h2o_bias: torch.Tensor,
    hidden: torch.Tensor,
) -> torch.Tensor:
    """
    Vanilla RNN forward pass

    Args:
        x: Input tensor of shape (batch_size, input_size)
        i2h_weight: Weight tensor for input-to-hidden layer
        i2h_bias: Bias tensor for input-to-hidden layer
        h2o_weight: Weight tensor for hidden-to-output layer
        h2o_bias: Bias tensor for hidden-to-output layer
        hidden: Hidden state tensor

    Returns:
        Output tensor of shape (batch_size, output_size)
    """
    hidden = hidden.to(x.device)
    combined = torch.cat((x, hidden), dim=1)
    hidden = torch.tanh(F.linear(combined, i2h_weight, i2h_bias))
    output = F.linear(hidden, h2o_weight, h2o_bias)
    return output


class Model(nn.Module):
    def __init__(self, input_size: int, hidden_size: int, output_size: int):
        """
        Initialize the Vanilla RNN model.

        :param input_size: The number of input features (int).
        :param hidden_size: The size of the hidden state (int).
        :param output_size: The number of output features (int).
        """
        super(Model, self).__init__()
        self.input_size = input_size
        self.hidden_size = hidden_size
        self.output_size = output_size
        self.hidden = nn.Parameter(torch.randn((batch_size, hidden_size)))

        # Extract parameters from linear layers
        i2h = nn.Linear(input_size + hidden_size, hidden_size)
        self.i2h_weight = nn.Parameter(i2h.weight.data.clone())
        self.i2h_bias = nn.Parameter(i2h.bias.data.clone())

        h2o = nn.Linear(hidden_size, output_size)
        self.h2o_weight = nn.Parameter(h2o.weight.data.clone())
        self.h2o_bias = nn.Parameter(h2o.bias.data.clone())

    def forward(self, x: torch.Tensor, fn=module_fn) -> torch.Tensor:
        return fn(
            x,
            self.i2h_weight,
            self.i2h_bias,
            self.h2o_weight,
            self.h2o_bias,
            self.hidden,
        )


batch_size = 8
input_size = 1024
hidden_size = 256
output_size = 128
sequence_length = 256


def get_inputs():
    return [torch.randn(batch_size, input_size)]


def get_init_inputs():
    return [input_size, hidden_size, output_size]

import torch
import torch.nn as nn

class Model(nn.Module):
    def __init__(self, input_size: int, hidden_size: int, output_size: int):
        """
        Initialize the Vanilla RNN model.
        
        :param input_size: The number of input features (int).
        :param hidden_size: The size of the hidden state (int).
        :param output_size: The number of output features (int).
        """
        super(Model, self).__init__()
        self.input_size = input_size
        self.hidden_size = hidden_size
        self.output_size = output_size
        self.hidden = torch.randn((batch_size, hidden_size))
        
        # Define the RNN cell components (input to hidden, hidden to hidden, and hidden to output)
        self.i2h = nn.Linear(input_size + hidden_size, hidden_size)  # Input to hidden
        self.h2o = nn.Linear(hidden_size, output_size)  # Hidden to output
        self.tanh = nn.Tanh()  # Activation function for hidden state
    
    def forward(self, x: torch.Tensor) -> torch.Tensor:
        """
        Forward pass of the Vanilla RNN.
        
        :param x: Input tensor of shape (batch_size, input_size).
        :param hidden: Hidden state tensor of shape (batch_size, hidden_size).
        :return: Output tensor of shape (batch_size, output_size), and the new hidden state.
        """
        self.hidden = self.hidden.to(x.device)
        combined = torch.cat((x, self.hidden), dim=1)  # Concatenate input and hidden state
        self.hidden = self.tanh(self.i2h(combined))  # Update hidden state
        output = self.h2o(self.hidden)  # Compute output
        return output

batch_size = 8
input_size = 1024
hidden_size = 256
output_size = 128
sequence_length = 256

def get_inputs():
    return [torch.randn(batch_size, input_size)]

def get_init_inputs():
    return [input_size, hidden_size, output_size]
Download Evaluation Download PyTorch Download CUDA Download Profiles

Kernel Information

Operation Name 33_VanillaRNN
Level ID 3
Task ID 33
Kernel Name modular_warp_rnn_base
CUDA Speedup (Native) 1.106x
CUDA Speedup (Compile) 2.449x
CUDA Runtime 0.024 ms
PyTorch Runtime (Native) 0.027 ms
PyTorch Runtime (Compile) 0.059 ms
Correct True
Max Diff (vs. Reference) 0.000000
Model openrouter-deepseek-reasoner
Temperature 1.00
View Experiment Progress Details

Related Kernels (Level 3, Task 33 • 33_VanillaRNN)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 fused_rnn_i2h_warp_base 0.02 1.21 2.67
🥈 warp_optimized_rnn_base 0.02 1.15 2.56
🥈 optimized_rnn_reduction_base 0.02 1.15 2.56
4 atomic_rnn_optimized_edit_1 0.02 1.11 2.45
4 modular_warp_rnn_base 0.02 1.11 2.45
6 balanced_load_rnn_base_base 0.03 0.83 1.84
6 optimized_concat_kernel_base 0.03 0.83 1.84
6 optimized_unroll_concat_base 0.03 0.83 1.84
6 shared_memory_optimized_edit_1 0.03 0.83 1.84
6 stride_loops_rnn_base 0.03 0.83 1.84
6 optimal_blocksize_rnn_edit_1 0.03 0.83 1.84
6 modular_vanillarnn_edit_1 0.03 0.83 1.84
6 unroll_optimized_rnn_base_base 0.03 0.83 1.84
6 optimized_concat_base 0.03 0.83 1.84
15 unrolled_rnn_base_base 0.03 0.80 1.78
15 efficient_concat_base 0.03 0.80 1.78
15 sync_optimized_rnn_base_base 0.03 0.80 1.78
15 atomic_optimized_rnn_base 0.03 0.80 1.78
15 warp_aligned_rnn_base 0.03 0.80 1.78
15 optimized_concat_kernel_edit_1 0.03 0.80 1.78 
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <cooperative_groups.h>
#include <cooperative_groups/reduce.h>

namespace cg = cooperative_groups;

template<int STRIDE>
__device__ __forceinline__ float warp_reduce_sum(float val) {
    #pragma unroll
    for (int i = STRIDE; i > 0; i >>= 1) {
        val += __shfl_down_sync(0xffffffff, val, i);
    }
    return val;
}

__device__ __forceinline__ void linear_transformation(
    const float* __restrict__ a,
    const float* __restrict__ w,
    int row,
    int col,
    int K,
    float& sum
) {
    const int tid = threadIdx.x % 32;
    const float* a_row = a + row * K;
    const float* w_row = w + col * K;

    #pragma unroll 4
    for (int k = tid; k < K; k += 32) {
        sum += a_row[k] * w_row[k];
    }
}

__global__ void linear_tanh_kernel(
    const float* __restrict__ A,
    const float* __restrict__ weight,
    const float* __restrict__ bias,
    float* __restrict__ out,
    int B, int K, int M
) {
    const int global_tid = blockIdx.x * blockDim.x + threadIdx.x;
    const int warp_id = global_tid / 32;
    const int row = warp_id / M;
    const int col = warp_id % M;

    if (row >= B) return;

    float sum = 0.0f;
    linear_transformation(A, weight, row, col, K, sum);
    sum = warp_reduce_sum<16>(sum);

    if (threadIdx.x % 32 == 0) {
        out[row * M + col] = tanhf(sum + bias[col]);
    }
}

__global__ void concat_kernel(
    const float* __restrict__ x,
    const float* __restrict__ hidden,
    float* __restrict__ combined,
    int batch_size,
    int x_size,
    int hidden_size,
    int total_elements
) {
    const int idx = blockIdx.x * blockDim.x + threadIdx.x;
    const int combined_width = x_size + hidden_size;
    
    for (int i = idx; i < total_elements; i += blockDim.x * gridDim.x) {
        const int row = i / combined_width;
        const int col = i % combined_width;
        combined[i] = (col < x_size) 
            ? x[row * x_size + col] 
            : hidden[row * hidden_size + (col - x_size)];
    }
}

torch::Tensor module_fn_cuda(
    torch::Tensor x,
    torch::Tensor i2h_weight,
    torch::Tensor i2h_bias,
    torch::Tensor h2o_weight,
    torch::Tensor h2o_bias,
    torch::Tensor hidden
) {
    x = x.contiguous().cuda();
    i2h_weight = i2h_weight.contiguous().cuda();
    i2h_bias = i2h_bias.contiguous().cuda();
    h2o_weight = h2o_weight.contiguous().cuda();
    h2o_bias = h2o_bias.contiguous().cuda();
    hidden = hidden.contiguous().cuda();

    const int batch_size = x.size(0);
    const int x_size = x.size(1);
    const int hidden_size = hidden.size(1);
    const int combined_size = x_size + hidden_size;

    auto combined = torch::empty({batch_size, combined_size}, x.options());
    
    // Concatenation kernel
    const int concat_blocks = (batch_size * combined_size + 255) / 256;
    concat_kernel<<<concat_blocks, 256>>>(
        x.data_ptr<float>(),
        hidden.data_ptr<float>(),
        combined.data_ptr<float>(),
        batch_size,
        x_size,
        hidden_size,
        batch_size * combined_size
    );

    // Custom linear kernel
    const int M = i2h_weight.size(0);
    const int num_warps = batch_size * M;
    const int threads_per_block = 256;
    const int blocks = (num_warps * 32 + threads_per_block - 1) / threads_per_block;
    
    auto hidden_new = torch::empty({batch_size, M}, x.options());
    linear_tanh_kernel<<<blocks, threads_per_block>>>(
        combined.data_ptr<float>(),
        i2h_weight.data_ptr<float>(),
        i2h_bias.data_ptr<float>(),
        hidden_new.data_ptr<float>(),
        batch_size,
        combined_size,
        M
    );

    // Output layer (keep as optimized torch::addmm)
    return torch::addmm(h2o_bias, hidden_new, h2o_weight.t());
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &module_fn_cuda, "Optimized Modular RNN Forward (CUDA)");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.264 inst/cycle 0.000 5
Executed Ipc Elapsed 0.030 inst/cycle 0.000 5
Issue Slots Busy 7.134 % 0.062 5
Issued Ipc Active 0.286 inst/cycle 0.000 5
SM Busy 7.134 % 0.062 5
Memory Throughput 12733366835.214 byte/second 159088808707971328.000 5
Mem Busy 9.358 % 0.099 5
Max Bandwidth 5.046 % 0.029 5
L1/TEX Hit Rate 0.000 % 0.000 5
L2 Hit Rate 97.782 % 0.157 5
Mem Pipes Busy 0.888 % 0.001 5
Warp Cycles Per Issued Instruction 26.172 cycle 0.064 5
Warp Cycles Per Executed Instruction 28.284 cycle 0.074 5
Avg. Active Threads Per Warp 32.000 0.000 5
Avg. Not Predicated Off Threads Per Warp 26.010 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 10.000 block 0.000 5
Block Limit Shared Mem 32.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 12.172 % 0.009 5
Achieved Active Warps Per SM 7.790 warp 0.003 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (12.3%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 326224.11 μs
Device Time 68.70 μs
Self CPU Time 22360.76 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 303863.35 μs
Device Time 68.70 μs
Self CPU Time 104.92 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 303337.26 μs
Device Time 0.00 μs
Self CPU Time 109.56 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 302866.41 μs
Device Time 0.00 μs
Self CPU Time 302866.41 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 287982.51 μs
Device Time 25770.38 μs
Self CPU Time 287982.51 μs
Self Device Time 25770.38 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::addmm
CPU Time 272237.19 μs
Device Time 97506.85 μs
Self CPU Time 167710.91 μs
Self Device Time 97506.85 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
sm80_xmma_gemm_f32f32_f32f32_f32_tn_n_tilesize32x32x8_stage3_warpsize1x2x1_ffma_aligna4_alignc4_execute_kernel__51_cublas
CPU Time 0.00 μs
Device Time 97518.56 μs
Self CPU Time 0.00 μs
Self Device Time 97518.56 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 82452.66 μs
Device Time 672377.84 μs
Self CPU Time 14807.53 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 67646.67 μs
Device Time 672377.84 μs
Self CPU Time 20826.94 μs
Self Device Time 672377.84 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 672377.84 μs
Self CPU Time 0.00 μs
Self Device Time 672377.84 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed 
45357 warnings generated when compiling for host.
Suppressed 45388 warnings (45341 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:19:5 bugprone-easily-swappable-parameters
19 | const float* __restrict__ a,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
20 | const float* __restrict__ w,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:19:31: note: the first parameter in the range is 'a'
19 | const float* __restrict__ a,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:20:31: note: the last parameter in the range is 'w'
20 | const float* __restrict__ w,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:21:5: warning: 2 adjacent parameters of 'linear_transformation' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
21 | int row,
| ^~~~~~~~
22 | int col,
| ~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:21:9: note: the first parameter in the range is 'row'
21 | int row,
| ^~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:22:9: note: the last parameter in the range is 'col'
22 | int col,
| ^~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:26:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
26 | const int tid = threadIdx.x % 32;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:27:26: warning: result of multiplication in type 'int' is used as a pointer offset after an implicit widening conversion to type 'ptrdiff_t' [bugprone-implicit-widening-of-multiplication-result]
27 | const float* a_row = a + row * K;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:27:30: note: make conversion explicit to silence this warning
6 | const float* a_row = a + row * K;
| ^~~~~~~
| static_cast<ptrdiff_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:27:30: note: perform multiplication in a wider type
27 | const float* a_row = a + row * K;
| ^~~
| static_cast<ptrdiff_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:28:26: warning: result of multiplication in type 'int' is used as a pointer offset after an implicit widening conversion to type 'ptrdiff_t' [bugprone-implicit-widening-of-multiplication-result]
28 | const float* w_row = w + col * K;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:28:30: note: make conversion explicit to silence this warning
28 | const float* w_row = w + col * K;
| ^~~~~~~
| static_cast<ptrdiff_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:28:30: note: perform multiplication in a wider type
28 | const float* w_row = w + col * K;
| ^~~
| static_cast<ptrdiff_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:38:5: warning: 2 adjacent parameters of 'linear_tanh_kernel' of similar type ('const float *__restrict') are easily swapped by mistake [bugprone-easily-swappable-parameters]
38 | const float* __restrict__ weight,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
39 | const float* __restrict__ bias,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:38:31: note: the first parameter in the range is 'weight'
38 | const float* __restrict__ weight,
| ^~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:39:31: note: the last parameter in the range is 'bias'
39 | const float* __restrict__ bias,
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:41:5: warning: 3 adjacent parameters of 'linear_tanh_kernel' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
41 | int B, int K, int M
| ^~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:41:9: note: the first parameter in the range is 'B'
41 | int B, int K, int M
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:41:23: note: the last parameter in the range is 'M'
41 | int B, int K, int M
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:43:28: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
43 | const int global_tid = blockIdx.x * blockDim.x + threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:63:5: warning: 2 adjacent parameters of 'concat_kernel' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
63 | int batch_size,
| ^~~~~~~~~~~~~~~
64 | int x_size,
| ~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:63:9: note: the first parameter in the range is 'batch_size'
63 | int batch_size,
| ^~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:64:9: note: the last parameter in the range is 'x_size'
64 | int x_size,
| ^~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:65:5: warning: 2 adjacent parameters of 'concat_kernel' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
65 | int hidden_size,
| ^~~~~~~~~~~~~~~~
66 | int total_elements
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:65:9: note: the first parameter in the range is 'hidden_size'
65 | int hidden_size,
| ^~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:66:9: note: the last parameter in the range is 'total_elements'
66 | int total_elements
| ^~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:68:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
68 | const int idx = blockIdx.x * blockDim.x + threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:71:48: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
71 | for (int i = idx; i < total_elements; i += blockDim.x * gridDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:95:28: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
95 | const int batch_size = x.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:96:24: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
96 | const int x_size = x.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:97:29: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
97 | const int hidden_size = hidden.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250212_optimize_b5_s4_e1_v2/level_3/task_33/b5_s2_modular_warp_rnn/base/base.cu:115:19: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
115 | const int M = i2h_weight.size(0);
| ^