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43_Max_Pooling_3D • maxpool3d_unrolled_base_base

Level 1 • Task 43
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    kernel_size: int,
    stride: int,
    padding: int,
    dilation: int,
    return_indices: bool,
    ceil_mode: bool,
) -> torch.Tensor:
    """
    Functional implementation of Max Pooling 3D.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, channels, dim1, dim2, dim3).
        kernel_size (int): Size of the kernel for the max pooling operation.
        stride (int): Stride of the pooling operation.
        padding (int): Padding applied to the input tensor.
        dilation (int): Spacing between kernel elements.
        return_indices (bool): Whether to return indices of the maximum values.
        ceil_mode (bool): When True, the output size is ceil(input_size / stride) instead of floor.

    Returns:
        torch.Tensor: Output tensor with Max Pooling 3D applied.
    """
    return F.max_pool3d(
        x,
        kernel_size=kernel_size,
        stride=stride,
        padding=padding,
        dilation=dilation,
        return_indices=return_indices,
        ceil_mode=ceil_mode,
    )


class Model(nn.Module):
    """
    Simple model that performs Max Pooling 3D.
    """

    def __init__(
        self,
        kernel_size: int,
        stride: int,
        padding: int,
        dilation: int,
        return_indices: bool,
        ceil_mode: bool,
    ):
        """
        Initializes the Max Pooling 3D layer.

        Args:
            kernel_size (int): Size of the kernel for the max pooling operation.
            stride (int): Stride of the pooling operation.
            padding (int): Padding applied to the input tensor.
            dilation (int): Spacing between kernel elements.
            return_indices (bool): Whether to return indices of the maximum values.
            ceil_mode (bool): When True, the output size is ceil(input_size / stride) instead of floor.
        """
        super(Model, self).__init__()
        self.kernel_size = kernel_size
        self.stride = stride
        self.padding = padding
        self.dilation = dilation
        self.return_indices = return_indices
        self.ceil_mode = ceil_mode

    def forward(self, x: torch.Tensor, fn=module_fn) -> torch.Tensor:
        """
        Applies Max Pooling 3D to the input tensor.

        Args:
            x (torch.Tensor): Input tensor of shape (batch_size, channels, dim1, dim2, dim3).

        Returns:
            torch.Tensor: Output tensor with Max Pooling 3D applied.
        """
        return fn(
            x,
            self.kernel_size,
            self.stride,
            self.padding,
            self.dilation,
            self.return_indices,
            self.ceil_mode,
        )


batch_size = 16
channels = 32
dim1 = 64
dim2 = 64
dim3 = 64
kernel_size = 3
stride = 2
padding = 1
dilation = 3
return_indices = False
ceil_mode = False


def get_inputs():
    x = torch.randn(batch_size, channels, dim1, dim2, dim3)
    return [x]


def get_init_inputs():
    return [kernel_size, stride, padding, dilation, return_indices, ceil_mode]

import torch
import torch.nn as nn


class Model(nn.Module):
    """
    Simple model that performs Max Pooling 3D.
    """

    def __init__(
        self,
        kernel_size: int,
        stride: int = None,
        padding: int = 0,
        dilation: int = 1,
        return_indices: bool = False,
        ceil_mode: bool = False,
    ):
        """
        Initializes the Max Pooling 3D layer.

        Args:
            kernel_size (int): Size of the kernel for the max pooling operation.
            stride (int, optional): Stride of the pooling operation. Defaults to None, which means stride is equal to kernel_size.
            padding (int, optional): Padding applied to the input tensor. Defaults to 0.
            dilation (int, optional): Spacing between kernel elements. Defaults to 1.
            return_indices (bool, optional): Whether to return indices of the maximum values. Defaults to False.
            ceil_mode (bool, optional): When True, the output size is ceil(input_size / stride) instead of floor. Defaults to False.
        """
        super(Model, self).__init__()
        self.maxpool = nn.MaxPool3d(
            kernel_size=kernel_size,
            stride=stride,
            padding=padding,
            dilation=dilation,
            return_indices=return_indices,
            ceil_mode=ceil_mode,
        )

    def forward(self, x: torch.Tensor) -> torch.Tensor:
        """
        Applies Max Pooling 3D to the input tensor.

        Args:
            x (torch.Tensor): Input tensor of shape (batch_size, channels, dim1, dim2, dim3).

        Returns:
            torch.Tensor: Output tensor with Max Pooling 3D applied.
        """
        return self.maxpool(x)


batch_size = 16
channels = 32
dim1 = 64
dim2 = 64
dim3 = 64
kernel_size = 3
stride = 2
padding = 1
dilation = 3
return_indices = False
ceil_mode = False


def get_inputs():
    x = torch.randn(batch_size, channels, dim1, dim2, dim3)
    return [x]


def get_init_inputs():
    return [kernel_size, stride, padding, dilation, return_indices, ceil_mode]
Download Evaluation Download PyTorch Download CUDA Download Profiles

Kernel Information

Operation Name 43_Max_Pooling_3D
Level ID 1
Task ID 43
Kernel Name maxpool3d_unrolled_base_base
CUDA Speedup (Native) 1.909x
CUDA Speedup (Compile) 3.586x
CUDA Runtime 0.251 ms
PyTorch Runtime (Native) 0.479 ms
PyTorch Runtime (Compile) 0.900 ms
Correct True
Max Diff (vs. Reference) 0.000000
Model bedrock/anthropic.claude-3-5-sonnet-20241022-v2:0
Temperature 0.50
View Experiment Progress Details

Related Kernels (Level 1, Task 43 • 43_Max_Pooling_3D)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 maxpool3d_unrolled_base_base 0.25 1.91 3.59
🥈 divergence_free_maxpool3d_base_base 0.30 1.59 2.99
🥉 max_pool3d_manual_unroll_full_unrolling_base 0.31 1.55 2.90
4 max_pool3d_manual_unroll_full_unrolling_edit_1 0.31 1.53 2.87
5 coalesced_maxpool3d_ldg_base 0.37 1.31 2.46
6 streamed_maxpool3d_base_base 0.38 1.25 2.35
6 max_pool3d_combined_base 0.38 1.25 2.35
6 combined_maxpool3d_base 0.38 1.25 2.35
9 max_pool3d_optimized_base 0.39 1.24 2.33
10 optimized_maxpool3d_kernel_base 0.39 1.23 2.32
10 modular_max_pool3d_optimized_base 0.39 1.23 2.32
12 optimized_max_pooling_3d_base 0.39 1.23 2.31
13 aligned_maxpool3d_ldg_base_base 0.39 1.23 2.31
14 block_size_experimentation_base 0.40 1.19 2.24
15 pipelined_max_pooling_3d_base 0.41 1.18 2.22
16 max_pool3d_optimized_sync_base_base 0.43 1.12 2.11
16 max_pool3d_optimized_blocksize_base 0.43 1.12 2.11
16 max_pool3d_unroll_loops_base 0.43 1.12 2.11
19 max_pool3d_optimized_sync_base_edit_1 0.43 1.12 2.11
20 even_workload_maxpool3d_base 0.43 1.11 2.09 
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <vector>
#include <limits>
#include <cmath>

template <typename scalar_t, int KERNEL_SIZE>
__global__ void maxpool3d_unrolled_kernel(
    const scalar_t* __restrict__ input,
    scalar_t* __restrict__ output,
    int64_t* __restrict__ indices,
    const int batch_size,
    const int channels,
    const int input_d, const int input_h, const int input_w,
    const int output_d, const int output_h, const int output_w,
    const int stride,
    const int padding,
    const int dilation) {

    const int w_out = blockIdx.x * blockDim.x + threadIdx.x;
    const int h_out = blockIdx.y * blockDim.y + threadIdx.y;
    const int linear_idx = blockIdx.z;

    if (w_out >= output_w || h_out >= output_h) return;

    const int d_out = linear_idx % output_d;
    const int tmp = linear_idx / output_d;
    const int c = tmp % channels;
    const int b = tmp / channels;

    const int d_start = d_out * stride - padding;
    const int h_start = h_out * stride - padding;
    const int w_start = w_out * stride - padding;

    scalar_t max_val = -std::numeric_limits<scalar_t>::infinity();
    int max_index = -1;

    if constexpr (KERNEL_SIZE <= 4) {
        #define UNROLL_KERNEL(kd, kh, kw) \
        { \
            const int d_in = d_start + kd * dilation; \
            const int h_in = h_start + kh * dilation; \
            const int w_in = w_start + kw * dilation; \
            if (d_in >= 0 && d_in < input_d && h_in >= 0 && h_in < input_h && w_in >= 0 && w_in < input_w) { \
                const int input_idx = (((b * channels + c) * input_d + d_in) * input_h + h_in) * input_w + w_in; \
                const scalar_t val = __ldg(&input[input_idx]); \
                if (val > max_val) { \
                    max_val = val; \
                    max_index = input_idx; \
                } \
            } \
        }

        #pragma unroll
        for (int kd = 0; kd < KERNEL_SIZE; kd++) {
            #pragma unroll
            for (int kh = 0; kh < KERNEL_SIZE; kh++) {
                #pragma unroll
                for (int kw = 0; kw < KERNEL_SIZE; kw++) {
                    UNROLL_KERNEL(kd, kh, kw)
                }
            }
        }
        #undef UNROLL_KERNEL
    } else {
        #pragma unroll 4
        for (int kd = 0; kd < KERNEL_SIZE; kd++) {
            const int d_in = d_start + kd * dilation;
            if (d_in >= 0 && d_in < input_d) {
                #pragma unroll 4
                for (int kh = 0; kh < KERNEL_SIZE; kh++) {
                    const int h_in = h_start + kh * dilation;
                    if (h_in >= 0 && h_in < input_h) {
                        #pragma unroll 4
                        for (int kw = 0; kw < KERNEL_SIZE; kw++) {
                            const int w_in = w_start + kw * dilation;
                            if (w_in >= 0 && w_in < input_w) {
                                const int input_idx = (((b * channels + c) * input_d + d_in) * input_h + h_in) * input_w + w_in;
                                const scalar_t val = __ldg(&input[input_idx]);
                                if (val > max_val) {
                                    max_val = val;
                                    max_index = input_idx;
                                }
                            }
                        }
                    }
                }
            }
        }
    }

    const int output_idx = (((b * channels + c) * output_d + d_out) * output_h + h_out) * output_w + w_out;
    output[output_idx] = max_val;
    if (indices != nullptr) {
        indices[output_idx] = max_index;
    }
}

torch::Tensor max_pool3d_cuda_forward(
    torch::Tensor input,
    int kernel_size,
    int stride,
    int padding,
    int dilation,
    bool return_indices,
    bool ceil_mode) {

    auto input_sizes = input.sizes();
    const int batch_size = input_sizes[0];
    const int channels = input_sizes[1];
    const int input_d = input_sizes[2];
    const int input_h = input_sizes[3];
    const int input_w = input_sizes[4];

    const int output_d = ceil_mode ? 
        ceil((input_d + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
        floor((input_d + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
    const int output_h = ceil_mode ?
        ceil((input_h + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
        floor((input_h + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
    const int output_w = ceil_mode ?
        ceil((input_w + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
        floor((input_w + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);

    auto output = torch::empty({batch_size, channels, output_d, output_h, output_w}, input.options());
    auto indices = return_indices ?
        torch::empty({batch_size, channels, output_d, output_h, output_w}, input.options().dtype(torch::kLong)) :
        torch::Tensor();

    dim3 block(32, 8);
    dim3 grid(
        (output_w + block.x - 1) / block.x,
        (output_h + block.y - 1) / block.y,
        batch_size * channels * output_d
    );

    AT_DISPATCH_FLOATING_TYPES(input.scalar_type(), "max_pool3d_forward_cuda", ([&] {
        switch(kernel_size) {
            case 2:
                maxpool3d_unrolled_kernel<scalar_t, 2><<<grid, block>>>(
                    input.data_ptr<scalar_t>(), output.data_ptr<scalar_t>(),
                    return_indices ? indices.data_ptr<int64_t>() : nullptr,
                    batch_size, channels, input_d, input_h, input_w,
                    output_d, output_h, output_w, stride, padding, dilation);
                break;
            case 3:
                maxpool3d_unrolled_kernel<scalar_t, 3><<<grid, block>>>(
                    input.data_ptr<scalar_t>(), output.data_ptr<scalar_t>(),
                    return_indices ? indices.data_ptr<int64_t>() : nullptr,
                    batch_size, channels, input_d, input_h, input_w,
                    output_d, output_h, output_w, stride, padding, dilation);
                break;
            case 4:
                maxpool3d_unrolled_kernel<scalar_t, 4><<<grid, block>>>(
                    input.data_ptr<scalar_t>(), output.data_ptr<scalar_t>(),
                    return_indices ? indices.data_ptr<int64_t>() : nullptr,
                    batch_size, channels, input_d, input_h, input_w,
                    output_d, output_h, output_w, stride, padding, dilation);
                break;
            default:
                maxpool3d_unrolled_kernel<scalar_t, 8><<<grid, block>>>(
                    input.data_ptr<scalar_t>(), output.data_ptr<scalar_t>(),
                    return_indices ? indices.data_ptr<int64_t>() : nullptr,
                    batch_size, channels, input_d, input_h, input_w,
                    output_d, output_h, output_w, stride, padding, dilation);
        }
    }));

    if (return_indices) {
        return torch::stack({output, indices}, 0);
    }
    return output;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &max_pool3d_cuda_forward, "Max Pool 3D forward with unrolled loops (CUDA)");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 2.748 inst/cycle 0.000 5
Executed Ipc Elapsed 2.720 inst/cycle 0.000 5
Issue Slots Busy 68.686 % 0.002 5
Issued Ipc Active 2.748 inst/cycle 0.000 5
SM Busy 68.932 % 0.002 5
Memory Throughput 1891402129264.818 byte/second 17782203979231621120.000 5
Mem Busy 44.084 % 0.001 5
Max Bandwidth 56.426 % 0.015 5
L1/TEX Hit Rate 72.820 % 0.000 5
L2 Hit Rate 33.780 % 0.001 5
Mem Pipes Busy 52.736 % 0.001 5
Warp Cycles Per Issued Instruction 19.336 cycle 0.000 5
Warp Cycles Per Executed Instruction 19.342 cycle 0.000 5
Avg. Active Threads Per Warp 30.080 0.000 5
Avg. Not Predicated Off Threads Per Warp 29.070 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 8.000 block 0.000 5
Block Limit Shared Mem 32.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 83.246 % 0.002 5
Achieved Active Warps Per SM 53.278 warp 0.001 5
Analysis Rules
Rule Description
WRN HighPipeUtilization ALU is the highest-utilized pipeline (68.9%) based on active cycles, taking into account the rates of its different instructions. It executes integer and logic operations. The pipeline is well-utilized, but might become a bottleneck if more work is added. Based on the number of executed instructions, the highest utilized pipeline (68.9%) is ALU. It executes integer and logic operations. Comparing the two, the overall pipeline utilization appears to be caused by frequent, low-latency instructions. See the Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-decoder) or hover over the pipeline name to understand the workloads handled by each pipeline. The Instruction Statistics section shows the mix of executed instructions in this kernel. Check the Warp State Statistics section for which reasons cause warps to stall.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (83.2%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::randn
CPU Time 600242.63 μs
Device Time 0.00 μs
Self CPU Time 100.94 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::normal_
CPU Time 600104.12 μs
Device Time 0.00 μs
Self CPU Time 600104.12 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::to
CPU Time 282298.78 μs
Device Time 54820.15 μs
Self CPU Time 47.97 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 1224631.07 μs
Device Time 10630.00 μs
Self CPU Time 1224631.07 μs
Self Device Time 10630.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void maxpool3d_unrolled_kernel<float, 3>(float const*, float*, long*, int, int, int, int, int, int, int, int, int, int, int)
CPU Time 0.00 μs
Device Time 1060971.42 μs
Self CPU Time 0.00 μs
Self Device Time 1060971.42 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 981760.65 μs
Device Time 324751.10 μs
Self CPU Time 7296.62 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 974466.00 μs
Device Time 324751.10 μs
Self CPU Time 9348.12 μs
Self Device Time 324751.10 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 324828.89 μs
Self CPU Time 0.00 μs
Self Device Time 324828.89 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed 
45308 warnings generated when compiling for host.
Suppressed 45325 warnings (45278 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:13:5 bugprone-easily-swappable-parameters
13 | const int batch_size,
| ^~~~~~~~~~~~~~~~~~~~~
14 | const int channels,
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:13:15: note: the first parameter in the range is 'batch_size'
13 | const int batch_size,
| ^~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:14:15: note: the last parameter in the range is 'channels'
14 | const int channels,
| ^~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:15:43: warning: 2 adjacent parameters of 'maxpool3d_unrolled_kernel' of similar type ('const int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
15 | const int input_d, const int input_h, const int input_w,
| ^~~~~~~~~~~~~~~~~~
16 | const int output_d, const int output_h, const int output_w,
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:15:53: note: the first parameter in the range is 'input_w'
15 | const int input_d, const int input_h, const int input_w,
| ^~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:16:15: note: the last parameter in the range is 'output_d'
16 | const int output_d, const int output_h, const int output_w,
| ^~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:16:45: warning: 2 adjacent parameters of 'maxpool3d_unrolled_kernel' of similar type ('const int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
16 | const int output_d, const int output_h, const int output_w,
| ^~~~~~~~~~~~~~~~~~~
17 | const int stride,
| ~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:16:55: note: the first parameter in the range is 'output_w'
16 | const int output_d, const int output_h, const int output_w,
| ^~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:17:15: note: the last parameter in the range is 'stride'
17 | const int stride,
| ^~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:18:5: warning: 2 adjacent parameters of 'maxpool3d_unrolled_kernel' of similar type ('const int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
18 | const int padding,
| ^~~~~~~~~~~~~~~~~~
19 | const int dilation) {
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:18:15: note: the first parameter in the range is 'padding'
18 | const int padding,
| ^~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:19:15: note: the last parameter in the range is 'dilation'
19 | const int dilation) {
| ^~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:21:23: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
21 | const int w_out = blockIdx.x * blockDim.x + threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:22:23: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
22 | const int h_out = blockIdx.y * blockDim.y + threadIdx.y;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:23:28: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
23 | const int linear_idx = blockIdx.z;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:42:40: warning: macro argument should be enclosed in parentheses [bugprone-macro-parentheses]
42 | const int d_in = d_start + kd * dilation; \
| ^
| ( )
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:43:40: warning: macro argument should be enclosed in parentheses [bugprone-macro-parentheses]
43 | const int h_in = h_start + kh * dilation; \
| ^
| ( )
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:44:40: warning: macro argument should be enclosed in parentheses [bugprone-macro-parentheses]
44 | const int w_in = w_start + kw * dilation; \
| ^
| ( )
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:110:28: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
110 | const int batch_size = input_sizes[0];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:111:26: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
111 | const int channels = input_sizes[1];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:112:25: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
112 | const int input_d = input_sizes[2];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:113:25: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
113 | const int input_h = input_sizes[3];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:114:25: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
114 | const int input_w = input_sizes[4];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:117:9: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
117 | ceil((input_d + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:117:14: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
117 | ceil((input_d + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:118:9: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
118 | floor((input_d + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:118:15: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
118 | floor((input_d + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:120:9: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
120 | ceil((input_h + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:120:14: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
120 | ceil((input_h + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:121:9: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
121 | floor((input_h + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:121:15: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
121 | floor((input_h + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:123:9: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
123 | ceil((input_w + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:123:14: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
123 | ceil((input_w + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:124:9: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
124 | floor((input_w + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:124:15: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
124 | floor((input_w + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b10_s3_maxpool3d_unrolled_base/base/base.cu:138:5: warning: inside a lambda, '__func__' expands to the name of the function call operator; consider capturing the name of the enclosing function explicitly [bugprone-lambda-function-name]
138 | AT_DISPATCH_FLOATING_TYPES(input.scalar_type(), "max_pool3d_forward_cuda", ([&] {
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:237:34: note: expanded from macro 'AT_DISPATCH_FLOATING_TYPES'
237 | AT_DISPATCH_SWITCH(TYPE, NAME, AT_DISPATCH_CASE_FLOATING_TYPES(__VA_ARGS__))
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:233:3: note: expanded from macro 'AT_DISPATCH_CASE_FLOATING_TYPES'
233 | AT_DISPATCH_CASE(at::ScalarType::Double, __VA_ARGS__) \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:74:3: note: expanded from macro 'AT_DISPATCH_CASE'
74 | AT_PRIVATE_CASE_TYPE_USING_HINT(enum_type, scalar_t, __VA_ARGS__)
| ^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:58:7: note: expanded from macro 'AT_PRIVATE_CHECK_SELECTIVE_BUILD'
58 | AT_ERROR( \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:711:32: note: expanded from macro 'AT_ERROR'
711 | C10_EXPAND_MSVC_WORKAROUND(TORCH_CHECK(false, ::c10::str(__VA_ARGS__))); \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:536:9: note: expanded from macro 'TORCH_CHECK'
536 | __func__, \
| ^