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43_Max_Pooling_3D • even_workload_maxpool3d_base

Level 1 • Task 43
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    kernel_size: int,
    stride: int,
    padding: int,
    dilation: int,
    return_indices: bool,
    ceil_mode: bool,
) -> torch.Tensor:
    """
    Functional implementation of Max Pooling 3D.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, channels, dim1, dim2, dim3).
        kernel_size (int): Size of the kernel for the max pooling operation.
        stride (int): Stride of the pooling operation.
        padding (int): Padding applied to the input tensor.
        dilation (int): Spacing between kernel elements.
        return_indices (bool): Whether to return indices of the maximum values.
        ceil_mode (bool): When True, the output size is ceil(input_size / stride) instead of floor.

    Returns:
        torch.Tensor: Output tensor with Max Pooling 3D applied.
    """
    return F.max_pool3d(
        x,
        kernel_size=kernel_size,
        stride=stride,
        padding=padding,
        dilation=dilation,
        return_indices=return_indices,
        ceil_mode=ceil_mode,
    )


class Model(nn.Module):
    """
    Simple model that performs Max Pooling 3D.
    """

    def __init__(
        self,
        kernel_size: int,
        stride: int,
        padding: int,
        dilation: int,
        return_indices: bool,
        ceil_mode: bool,
    ):
        """
        Initializes the Max Pooling 3D layer.

        Args:
            kernel_size (int): Size of the kernel for the max pooling operation.
            stride (int): Stride of the pooling operation.
            padding (int): Padding applied to the input tensor.
            dilation (int): Spacing between kernel elements.
            return_indices (bool): Whether to return indices of the maximum values.
            ceil_mode (bool): When True, the output size is ceil(input_size / stride) instead of floor.
        """
        super(Model, self).__init__()
        self.kernel_size = kernel_size
        self.stride = stride
        self.padding = padding
        self.dilation = dilation
        self.return_indices = return_indices
        self.ceil_mode = ceil_mode

    def forward(self, x: torch.Tensor, fn=module_fn) -> torch.Tensor:
        """
        Applies Max Pooling 3D to the input tensor.

        Args:
            x (torch.Tensor): Input tensor of shape (batch_size, channels, dim1, dim2, dim3).

        Returns:
            torch.Tensor: Output tensor with Max Pooling 3D applied.
        """
        return fn(
            x,
            self.kernel_size,
            self.stride,
            self.padding,
            self.dilation,
            self.return_indices,
            self.ceil_mode,
        )


batch_size = 16
channels = 32
dim1 = 64
dim2 = 64
dim3 = 64
kernel_size = 3
stride = 2
padding = 1
dilation = 3
return_indices = False
ceil_mode = False


def get_inputs():
    x = torch.randn(batch_size, channels, dim1, dim2, dim3)
    return [x]


def get_init_inputs():
    return [kernel_size, stride, padding, dilation, return_indices, ceil_mode]

import torch
import torch.nn as nn


class Model(nn.Module):
    """
    Simple model that performs Max Pooling 3D.
    """

    def __init__(
        self,
        kernel_size: int,
        stride: int = None,
        padding: int = 0,
        dilation: int = 1,
        return_indices: bool = False,
        ceil_mode: bool = False,
    ):
        """
        Initializes the Max Pooling 3D layer.

        Args:
            kernel_size (int): Size of the kernel for the max pooling operation.
            stride (int, optional): Stride of the pooling operation. Defaults to None, which means stride is equal to kernel_size.
            padding (int, optional): Padding applied to the input tensor. Defaults to 0.
            dilation (int, optional): Spacing between kernel elements. Defaults to 1.
            return_indices (bool, optional): Whether to return indices of the maximum values. Defaults to False.
            ceil_mode (bool, optional): When True, the output size is ceil(input_size / stride) instead of floor. Defaults to False.
        """
        super(Model, self).__init__()
        self.maxpool = nn.MaxPool3d(
            kernel_size=kernel_size,
            stride=stride,
            padding=padding,
            dilation=dilation,
            return_indices=return_indices,
            ceil_mode=ceil_mode,
        )

    def forward(self, x: torch.Tensor) -> torch.Tensor:
        """
        Applies Max Pooling 3D to the input tensor.

        Args:
            x (torch.Tensor): Input tensor of shape (batch_size, channels, dim1, dim2, dim3).

        Returns:
            torch.Tensor: Output tensor with Max Pooling 3D applied.
        """
        return self.maxpool(x)


batch_size = 16
channels = 32
dim1 = 64
dim2 = 64
dim3 = 64
kernel_size = 3
stride = 2
padding = 1
dilation = 3
return_indices = False
ceil_mode = False


def get_inputs():
    x = torch.randn(batch_size, channels, dim1, dim2, dim3)
    return [x]


def get_init_inputs():
    return [kernel_size, stride, padding, dilation, return_indices, ceil_mode]
Download Evaluation Download PyTorch Download CUDA Download Profiles

Kernel Information

Operation Name 43_Max_Pooling_3D
Level ID 1
Task ID 43
Kernel Name even_workload_maxpool3d_base
CUDA Speedup (Native) 1.114x
CUDA Speedup (Compile) 2.093x
CUDA Runtime 0.430 ms
PyTorch Runtime (Native) 0.479 ms
PyTorch Runtime (Compile) 0.900 ms
Correct True
Max Diff (vs. Reference) 0.000000
Model o3-mini-2025-01-31
Temperature 1.00
View Experiment Progress Details

Related Kernels (Level 1, Task 43 • 43_Max_Pooling_3D)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 maxpool3d_unrolled_base_base 0.25 1.91 3.59
🥈 divergence_free_maxpool3d_base_base 0.30 1.59 2.99
🥉 max_pool3d_manual_unroll_full_unrolling_base 0.31 1.55 2.90
4 max_pool3d_manual_unroll_full_unrolling_edit_1 0.31 1.53 2.87
5 coalesced_maxpool3d_ldg_base 0.37 1.31 2.46
6 streamed_maxpool3d_base_base 0.38 1.25 2.35
6 max_pool3d_combined_base 0.38 1.25 2.35
6 combined_maxpool3d_base 0.38 1.25 2.35
9 max_pool3d_optimized_base 0.39 1.24 2.33
10 optimized_maxpool3d_kernel_base 0.39 1.23 2.32
10 modular_max_pool3d_optimized_base 0.39 1.23 2.32
12 optimized_max_pooling_3d_base 0.39 1.23 2.31
13 aligned_maxpool3d_ldg_base_base 0.39 1.23 2.31
14 block_size_experimentation_base 0.40 1.19 2.24
15 pipelined_max_pooling_3d_base 0.41 1.18 2.22
16 max_pool3d_optimized_sync_base_base 0.43 1.12 2.11
16 max_pool3d_optimized_blocksize_base 0.43 1.12 2.11
16 max_pool3d_unroll_loops_base 0.43 1.12 2.11
19 max_pool3d_optimized_sync_base_edit_1 0.43 1.12 2.11
20 even_workload_maxpool3d_base 0.43 1.11 2.09 
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <vector>
#include <limits>
#include <cmath>

// Kernel that maps the 5D output tensor (batch, channel, depth, height, width) onto a 3D grid.
// The grid dimensions: 
//   grid.x: covers output width
//   grid.y: covers output height
//   grid.z: covers batch * channels * output_depth
// Each thread computes one output element with coordinates (b, c, d, h, w).

template <typename scalar_t>
__global__ void max_pool3d_even_workload_kernel(
    const scalar_t* __restrict__ input,
    scalar_t* __restrict__ output,
    int64_t* __restrict__ indices,
    const int batch_size,
    const int channels,
    const int input_d, const int input_h, const int input_w,
    const int output_d, const int output_h, const int output_w,
    const int kernel_size,
    const int stride,
    const int padding,
    const int dilation) {

    // Compute output spatial coordinates for width and height
    int w_out = blockIdx.x * blockDim.x + threadIdx.x;
    int h_out = blockIdx.y * blockDim.y + threadIdx.y;
    
    // Flatten batch, channel, and output depth into the z-dimension
    int index_z = blockIdx.z * blockDim.z + threadIdx.z;
    int total_z = batch_size * channels * output_d;

    if (w_out < output_w && h_out < output_h && index_z < total_z) {
        // Decode index_z into output depth, channel and batch
        int d_out = index_z % output_d;
        int temp = index_z / output_d;
        int c = temp % channels;
        int b = temp / channels;

        // Compute the starting indices in the input tensor
        int d_start = d_out * stride - padding;
        int h_start = h_out * stride - padding;
        int w_start = w_out * stride - padding;

        // Calculate valid pooling window boundaries to avoid out-of-bound accesses
        int k_d_start = (d_start < 0) ? ((-d_start + dilation - 1) / dilation) : 0;
        int k_d_end = min(kernel_size, (input_d - d_start + dilation - 1) / dilation);
        int k_h_start = (h_start < 0) ? ((-h_start + dilation - 1) / dilation) : 0;
        int k_h_end = min(kernel_size, (input_h - h_start + dilation - 1) / dilation);
        int k_w_start = (w_start < 0) ? ((-w_start + dilation - 1) / dilation) : 0;
        int k_w_end = min(kernel_size, (input_w - w_start + dilation - 1) / dilation);

        scalar_t max_val = -std::numeric_limits<scalar_t>::infinity();
        int max_index = -1;

        // Iterate over the valid pooling window
        for (int kd = k_d_start; kd < k_d_end; kd++) {
            int d_in = d_start + kd * dilation;
            for (int kh = k_h_start; kh < k_h_end; kh++) {
                int h_in = h_start + kh * dilation;
                for (int kw = k_w_start; kw < k_w_end; kw++) {
                    int w_in = w_start + kw * dilation;
                    int input_idx = (((b * channels + c) * input_d + d_in) * input_h + h_in) * input_w + w_in;
                    scalar_t val = input[input_idx];
                    if (val > max_val) {
                        max_val = val;
                        max_index = input_idx;
                    }
                }
            }
        }

        // Compute the output index in the 5D tensor flattened in row-major order
        int output_idx = ((((b * channels + c) * output_d + d_out) * output_h + h_out) * output_w) + w_out;
        output[output_idx] = max_val;
        if (indices != nullptr) {
            indices[output_idx] = max_index;
        }
    }
}

// Host function: sets up kernel launch parameters using a 3D grid and 3D block to achieve even workload distribution

torch::Tensor max_pool3d_cuda_forward_even(
    torch::Tensor input,
    int kernel_size,
    int stride,
    int padding,
    int dilation,
    bool return_indices,
    bool ceil_mode) {

    auto input_sizes = input.sizes();
    const int batch_size = input_sizes[0];
    const int channels = input_sizes[1];
    const int input_d = input_sizes[2];
    const int input_h = input_sizes[3];
    const int input_w = input_sizes[4];

    // Compute output dimensions
    float d_out_f = (input_d + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1.0f;
    float h_out_f = (input_h + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1.0f;
    float w_out_f = (input_w + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1.0f;
    const int output_d = ceil_mode ? std::ceil(d_out_f) : std::floor(d_out_f);
    const int output_h = ceil_mode ? std::ceil(h_out_f) : std::floor(h_out_f);
    const int output_w = ceil_mode ? std::ceil(w_out_f) : std::floor(w_out_f);

    auto output = torch::empty({batch_size, channels, output_d, output_h, output_w}, input.options());
    auto indices = return_indices ?
        torch::empty({batch_size, channels, output_d, output_h, output_w}, input.options().dtype(torch::kLong)) :
        torch::Tensor();

    // Set up 3D block and grid dimensions
    const dim3 block(8, 8, 4);
    const dim3 grid(
        (output_w + block.x - 1) / block.x,
        (output_h + block.y - 1) / block.y,
        ((batch_size * channels * output_d) + block.z - 1) / block.z);

    AT_DISPATCH_FLOATING_TYPES(input.scalar_type(), "max_pool3d_forward_cuda_even", ([&] {
        max_pool3d_even_workload_kernel<scalar_t><<<grid, block>>>(
            input.data_ptr<scalar_t>(),
            output.data_ptr<scalar_t>(),
            return_indices ? indices.data_ptr<int64_t>() : nullptr,
            batch_size, channels,
            input_d, input_h, input_w,
            output_d, output_h, output_w,
            kernel_size, stride, padding, dilation);
    }));

    if (return_indices) {
        return torch::stack({output, indices}, 0);
    }
    return output;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &max_pool3d_cuda_forward_even, "Max Pool 3D forward even workload (CUDA)");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 3.090 inst/cycle 0.000 5
Executed Ipc Elapsed 3.064 inst/cycle 0.000 5
Issue Slots Busy 77.300 % 0.002 5
Issued Ipc Active 3.090 inst/cycle 0.000 5
SM Busy 77.300 % 0.002 5
Memory Throughput 1122800569472.968 byte/second 2862599910265689088.000 5
Mem Busy 57.452 % 0.000 5
Max Bandwidth 40.898 % 0.003 5
L1/TEX Hit Rate 66.142 % 0.000 5
L2 Hit Rate 61.200 % 0.001 5
Mem Pipes Busy 27.142 % 0.000 5
Warp Cycles Per Issued Instruction 18.652 cycle 0.000 5
Warp Cycles Per Executed Instruction 18.654 cycle 0.000 5
Avg. Active Threads Per Warp 27.830 0.000 5
Avg. Not Predicated Off Threads Per Warp 25.250 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 8.000 block 0.000 5
Block Limit Shared Mem 32.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 90.272 % 0.000 5
Achieved Active Warps Per SM 57.774 warp 0.000 5
Analysis Rules
Rule Description
WRN HighPipeUtilization ALU is the highest-utilized pipeline (60.1%) based on active cycles, taking into account the rates of its different instructions. It executes integer and logic operations. The pipeline is well-utilized, but might become a bottleneck if more work is added. Based on the number of executed instructions, the highest utilized pipeline (60.1%) is ALU. It executes integer and logic operations. Comparing the two, the overall pipeline utilization appears to be caused by frequent, low-latency instructions. See the Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-decoder) or hover over the pipeline name to understand the workloads handled by each pipeline. The Instruction Statistics section shows the mix of executed instructions in this kernel. Check the Warp State Statistics section for which reasons cause warps to stall.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
INF Occupancy This kernel's theoretical occupancy is not impacted by any block limit.
Operation / Metric Value Unit
aten::randn
CPU Time 616602.10 μs
Device Time 0.00 μs
Self CPU Time 85.40 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::normal_
CPU Time 616485.54 μs
Device Time 0.00 μs
Self CPU Time 616485.54 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::to
CPU Time 311309.82 μs
Device Time 56910.57 μs
Self CPU Time 37.65 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 2761926.97 μs
Device Time 15416.58 μs
Self CPU Time 2761926.97 μs
Self Device Time 15416.58 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void max_pool3d_even_workload_kernel<float>(float const*, float*, long*, int, int, int, int, int, int, int, int, int, int, int, int)
CPU Time 0.00 μs
Device Time 2570122.11 μs
Self CPU Time 0.00 μs
Self Device Time 2570122.11 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 2423471.78 μs
Device Time 461155.84 μs
Self CPU Time 13004.20 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 2410469.16 μs
Device Time 461155.84 μs
Self CPU Time 15217.38 μs
Self Device Time 461155.84 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 461155.84 μs
Self CPU Time 0.00 μs
Self Device Time 461155.84 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed 
45303 warnings generated when compiling for host.
Suppressed 45327 warnings (45280 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:22:43 bugprone-easily-swappable-parameters
22 | const int input_d, const int input_h, const int input_w,
| ^~~~~~~~~~~~~~~~~~
23 | const int output_d, const int output_h, const int output_w,
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:22:53: note: the first parameter in the range is 'input_w'
22 | const int input_d, const int input_h, const int input_w,
| ^~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:23:15: note: the last parameter in the range is 'output_d'
23 | const int output_d, const int output_h, const int output_w,
| ^~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:23:45: warning: 3 adjacent parameters of 'max_pool3d_even_workload_kernel' of similar type ('const int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
23 | const int output_d, const int output_h, const int output_w,
| ^~~~~~~~~~~~~~~~~~~
24 | const int kernel_size,
| ~~~~~~~~~~~~~~~~~~~~~~
25 | const int stride,
| ~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:23:55: note: the first parameter in the range is 'output_w'
23 | const int output_d, const int output_h, const int output_w,
| ^~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:25:15: note: the last parameter in the range is 'stride'
25 | const int stride,
| ^~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:26:5: warning: 2 adjacent parameters of 'max_pool3d_even_workload_kernel' of similar type ('const int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
26 | const int padding,
| ^~~~~~~~~~~~~~~~~~
27 | const int dilation) {
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:26:15: note: the first parameter in the range is 'padding'
26 | const int padding,
| ^~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:27:15: note: the last parameter in the range is 'dilation'
27 | const int dilation) {
| ^~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:30:17: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
30 | int w_out = blockIdx.x * blockDim.x + threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:31:17: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
31 | int h_out = blockIdx.y * blockDim.y + threadIdx.y;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:34:19: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
34 | int index_z = blockIdx.z * blockDim.z + threadIdx.z;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:98:28: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
98 | const int batch_size = input_sizes[0];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:99:26: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
99 | const int channels = input_sizes[1];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:100:25: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
100 | const int input_d = input_sizes[2];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:101:25: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
101 | const int input_h = input_sizes[3];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:102:25: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
102 | const int input_w = input_sizes[4];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:105:21: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
105 | float d_out_f = (input_d + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1.0f;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:106:21: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
106 | float h_out_f = (input_h + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1.0f;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:107:21: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
107 | float w_out_f = (input_w + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1.0f;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:108:38: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
108 | const int output_d = ceil_mode ? std::ceil(d_out_f) : std::floor(d_out_f);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:108:59: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
108 | const int output_d = ceil_mode ? std::ceil(d_out_f) : std::floor(d_out_f);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:109:38: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
109 | const int output_h = ceil_mode ? std::ceil(h_out_f) : std::floor(h_out_f);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:109:59: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
109 | const int output_h = ceil_mode ? std::ceil(h_out_f) : std::floor(h_out_f);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:110:38: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
110 | const int output_w = ceil_mode ? std::ceil(w_out_f) : std::floor(w_out_f);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:110:59: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
110 | const int output_w = ceil_mode ? std::ceil(w_out_f) : std::floor(w_out_f);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b7_s0_even_workload_maxpool3d/base/base.cu:124:5: warning: inside a lambda, '__func__' expands to the name of the function call operator; consider capturing the name of the enclosing function explicitly [bugprone-lambda-function-name]
124 | AT_DISPATCH_FLOATING_TYPES(input.scalar_type(), "max_pool3d_forward_cuda_even", ([&] {
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:237:34: note: expanded from macro 'AT_DISPATCH_FLOATING_TYPES'
237 | AT_DISPATCH_SWITCH(TYPE, NAME, AT_DISPATCH_CASE_FLOATING_TYPES(__VA_ARGS__))
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:233:3: note: expanded from macro 'AT_DISPATCH_CASE_FLOATING_TYPES'
233 | AT_DISPATCH_CASE(at::ScalarType::Double, __VA_ARGS__) \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:74:3: note: expanded from macro 'AT_DISPATCH_CASE'
74 | AT_PRIVATE_CASE_TYPE_USING_HINT(enum_type, scalar_t, __VA_ARGS__)
| ^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:58:7: note: expanded from macro 'AT_PRIVATE_CHECK_SELECTIVE_BUILD'
58 | AT_ERROR( \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:711:32: note: expanded from macro 'AT_ERROR'
711 | C10_EXPAND_MSVC_WORKAROUND(TORCH_CHECK(false, ::c10::str(__VA_ARGS__))); \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:536:9: note: expanded from macro 'TORCH_CHECK'
536 | __func__, \
| ^