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43_Max_Pooling_3D • optimized_maxpool3d_kernel_base

Level 1 • Task 43
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    kernel_size: int,
    stride: int,
    padding: int,
    dilation: int,
    return_indices: bool,
    ceil_mode: bool,
) -> torch.Tensor:
    """
    Functional implementation of Max Pooling 3D.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, channels, dim1, dim2, dim3).
        kernel_size (int): Size of the kernel for the max pooling operation.
        stride (int): Stride of the pooling operation.
        padding (int): Padding applied to the input tensor.
        dilation (int): Spacing between kernel elements.
        return_indices (bool): Whether to return indices of the maximum values.
        ceil_mode (bool): When True, the output size is ceil(input_size / stride) instead of floor.

    Returns:
        torch.Tensor: Output tensor with Max Pooling 3D applied.
    """
    return F.max_pool3d(
        x,
        kernel_size=kernel_size,
        stride=stride,
        padding=padding,
        dilation=dilation,
        return_indices=return_indices,
        ceil_mode=ceil_mode,
    )


class Model(nn.Module):
    """
    Simple model that performs Max Pooling 3D.
    """

    def __init__(
        self,
        kernel_size: int,
        stride: int,
        padding: int,
        dilation: int,
        return_indices: bool,
        ceil_mode: bool,
    ):
        """
        Initializes the Max Pooling 3D layer.

        Args:
            kernel_size (int): Size of the kernel for the max pooling operation.
            stride (int): Stride of the pooling operation.
            padding (int): Padding applied to the input tensor.
            dilation (int): Spacing between kernel elements.
            return_indices (bool): Whether to return indices of the maximum values.
            ceil_mode (bool): When True, the output size is ceil(input_size / stride) instead of floor.
        """
        super(Model, self).__init__()
        self.kernel_size = kernel_size
        self.stride = stride
        self.padding = padding
        self.dilation = dilation
        self.return_indices = return_indices
        self.ceil_mode = ceil_mode

    def forward(self, x: torch.Tensor, fn=module_fn) -> torch.Tensor:
        """
        Applies Max Pooling 3D to the input tensor.

        Args:
            x (torch.Tensor): Input tensor of shape (batch_size, channels, dim1, dim2, dim3).

        Returns:
            torch.Tensor: Output tensor with Max Pooling 3D applied.
        """
        return fn(
            x,
            self.kernel_size,
            self.stride,
            self.padding,
            self.dilation,
            self.return_indices,
            self.ceil_mode,
        )


batch_size = 16
channels = 32
dim1 = 64
dim2 = 64
dim3 = 64
kernel_size = 3
stride = 2
padding = 1
dilation = 3
return_indices = False
ceil_mode = False


def get_inputs():
    x = torch.randn(batch_size, channels, dim1, dim2, dim3)
    return [x]


def get_init_inputs():
    return [kernel_size, stride, padding, dilation, return_indices, ceil_mode]

import torch
import torch.nn as nn


class Model(nn.Module):
    """
    Simple model that performs Max Pooling 3D.
    """

    def __init__(
        self,
        kernel_size: int,
        stride: int = None,
        padding: int = 0,
        dilation: int = 1,
        return_indices: bool = False,
        ceil_mode: bool = False,
    ):
        """
        Initializes the Max Pooling 3D layer.

        Args:
            kernel_size (int): Size of the kernel for the max pooling operation.
            stride (int, optional): Stride of the pooling operation. Defaults to None, which means stride is equal to kernel_size.
            padding (int, optional): Padding applied to the input tensor. Defaults to 0.
            dilation (int, optional): Spacing between kernel elements. Defaults to 1.
            return_indices (bool, optional): Whether to return indices of the maximum values. Defaults to False.
            ceil_mode (bool, optional): When True, the output size is ceil(input_size / stride) instead of floor. Defaults to False.
        """
        super(Model, self).__init__()
        self.maxpool = nn.MaxPool3d(
            kernel_size=kernel_size,
            stride=stride,
            padding=padding,
            dilation=dilation,
            return_indices=return_indices,
            ceil_mode=ceil_mode,
        )

    def forward(self, x: torch.Tensor) -> torch.Tensor:
        """
        Applies Max Pooling 3D to the input tensor.

        Args:
            x (torch.Tensor): Input tensor of shape (batch_size, channels, dim1, dim2, dim3).

        Returns:
            torch.Tensor: Output tensor with Max Pooling 3D applied.
        """
        return self.maxpool(x)


batch_size = 16
channels = 32
dim1 = 64
dim2 = 64
dim3 = 64
kernel_size = 3
stride = 2
padding = 1
dilation = 3
return_indices = False
ceil_mode = False


def get_inputs():
    x = torch.randn(batch_size, channels, dim1, dim2, dim3)
    return [x]


def get_init_inputs():
    return [kernel_size, stride, padding, dilation, return_indices, ceil_mode]
Download Evaluation Download PyTorch Download CUDA Download Profiles

Kernel Information

Operation Name 43_Max_Pooling_3D
Level ID 1
Task ID 43
Kernel Name optimized_maxpool3d_kernel_base
CUDA Speedup (Native) 1.235x
CUDA Speedup (Compile) 2.320x
CUDA Runtime 0.388 ms
PyTorch Runtime (Native) 0.479 ms
PyTorch Runtime (Compile) 0.900 ms
Correct True
Max Diff (vs. Reference) 0.000000
Model azure-gpt-4o-2024-08-06
Temperature 0.50
View Experiment Progress Details

Related Kernels (Level 1, Task 43 • 43_Max_Pooling_3D)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 maxpool3d_unrolled_base_base 0.25 1.91 3.59
🥈 divergence_free_maxpool3d_base_base 0.30 1.59 2.99
🥉 max_pool3d_manual_unroll_full_unrolling_base 0.31 1.55 2.90
4 max_pool3d_manual_unroll_full_unrolling_edit_1 0.31 1.53 2.87
5 coalesced_maxpool3d_ldg_base 0.37 1.31 2.46
6 streamed_maxpool3d_base_base 0.38 1.25 2.35
6 max_pool3d_combined_base 0.38 1.25 2.35
6 combined_maxpool3d_base 0.38 1.25 2.35
9 max_pool3d_optimized_base 0.39 1.24 2.33
10 optimized_maxpool3d_kernel_base 0.39 1.23 2.32
10 modular_max_pool3d_optimized_base 0.39 1.23 2.32
12 optimized_max_pooling_3d_base 0.39 1.23 2.31
13 aligned_maxpool3d_ldg_base_base 0.39 1.23 2.31
14 block_size_experimentation_base 0.40 1.19 2.24
15 pipelined_max_pooling_3d_base 0.41 1.18 2.22
16 max_pool3d_optimized_sync_base_base 0.43 1.12 2.11
16 max_pool3d_optimized_blocksize_base 0.43 1.12 2.11
16 max_pool3d_unroll_loops_base 0.43 1.12 2.11
19 max_pool3d_optimized_sync_base_edit_1 0.43 1.12 2.11
20 even_workload_maxpool3d_base 0.43 1.11 2.09 
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <vector>
#include <limits>
#include <cmath>

__device__ __forceinline__ int compute_start_position(int out_idx, int stride, int padding) {
    return out_idx * stride - padding;
}

__device__ __forceinline__ int compute_pool_bounds(int start, int input_size, int kernel_size, int dilation, bool is_start) {
    if (is_start) {
        return (start < 0) ? ((-start + dilation - 1) / dilation) : 0;
    } else {
        int valid_max = (input_size - start + dilation - 1) / dilation;
        return min(kernel_size, valid_max);
    }
}

__device__ __forceinline__ int compute_input_index(
    int b, int c, int d, int h, int w,
    int channels, int input_d, int input_h, int input_w) {
    return (((b * channels + c) * input_d + d) * input_h + h) * input_w + w;
}

// Unified kernel using 1D grid configuration for better load balancing and coalesced memory access
// Combining the best practices from both kernels

template <typename scalar_t>
__global__ void optimized_maxpool3d_kernel(
    const scalar_t* __restrict__ input,
    scalar_t* __restrict__ output,
    int64_t* __restrict__ indices,
    const int batch_size,
    const int channels,
    const int input_d, const int input_h, const int input_w,
    const int output_d, const int output_h, const int output_w,
    const int kernel_size,
    const int stride,
    const int padding,
    const int dilation) {

    const int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= batch_size * channels * output_d * output_h * output_w) return;

    int w_out = idx % output_w;
    int h_out = (idx / output_w) % output_h;
    int d_out = (idx / (output_w * output_h)) % output_d;
    int c = (idx / (output_w * output_h * output_d)) % channels;
    int b = idx / (output_w * output_h * output_d * channels);

    const int d_start = compute_start_position(d_out, stride, padding);
    const int h_start = compute_start_position(h_out, stride, padding);
    const int w_start = compute_start_position(w_out, stride, padding);

    const int k_d_start = compute_pool_bounds(d_start, input_d, kernel_size, dilation, true);
    const int k_d_end = compute_pool_bounds(d_start, input_d, kernel_size, dilation, false);
    const int k_h_start = compute_pool_bounds(h_start, input_h, kernel_size, dilation, true);
    const int k_h_end = compute_pool_bounds(h_start, input_h, kernel_size, dilation, false);
    const int k_w_start = compute_pool_bounds(w_start, input_w, kernel_size, dilation, true);
    const int k_w_end = compute_pool_bounds(w_start, input_w, kernel_size, dilation, false);

    scalar_t max_val = -std::numeric_limits<scalar_t>::infinity();
    int max_index = -1;

    #pragma unroll
    for (int k_d = k_d_start; k_d < k_d_end; k_d++) {
        const int d_in = d_start + k_d * dilation;
        #pragma unroll
        for (int k_h = k_h_start; k_h < k_h_end; k_h++) {
            const int h_in = h_start + k_h * dilation;
            #pragma unroll
            for (int k_w = k_w_start; k_w < k_w_end; k_w++) {
                const int w_in = w_start + k_w * dilation;
                const int input_idx = compute_input_index(b, c, d_in, h_in, w_in,
                                                        channels, input_d, input_h, input_w);
                const scalar_t val = __ldg(&input[input_idx]);
                if (val > max_val) {
                    max_val = val;
                    max_index = input_idx;
                }
            }
        }
    }

    output[idx] = max_val;
    if (indices != nullptr) {
        indices[idx] = max_index;
    }
}

// Host function to launch the optimized kernel

torch::Tensor optimized_max_pool3d_cuda_forward(
    torch::Tensor input,
    int kernel_size,
    int stride,
    int padding,
    int dilation,
    bool return_indices,
    bool ceil_mode) {

    auto input_sizes = input.sizes();
    const int batch_size = input_sizes[0];
    const int channels = input_sizes[1];
    const int input_d = input_sizes[2];
    const int input_h = input_sizes[3];
    const int input_w = input_sizes[4];

    const int output_d = ceil_mode ? 
        ceil((input_d + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
        floor((input_d + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
    const int output_h = ceil_mode ?
        ceil((input_h + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
        floor((input_h + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
    const int output_w = ceil_mode ?
        ceil((input_w + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
        floor((input_w + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);

    auto output = torch::empty({batch_size, channels, output_d, output_h, output_w}, input.options());
    auto indices = return_indices ? 
        torch::empty({batch_size, channels, output_d, output_h, output_w}, input.options().dtype(torch::kLong)) :
        torch::Tensor();

    const int threads = 256;
    const int blocks = (batch_size * channels * output_d * output_h * output_w + threads - 1) / threads;

    AT_DISPATCH_FLOATING_TYPES(input.scalar_type(), "optimized_max_pool3d_forward_cuda", ([&] {
        optimized_maxpool3d_kernel<scalar_t><<<blocks, threads>>>(
            input.data_ptr<scalar_t>(),
            output.data_ptr<scalar_t>(),
            return_indices ? indices.data_ptr<int64_t>() : nullptr,
            batch_size, channels,
            input_d, input_h, input_w,
            output_d, output_h, output_w,
            kernel_size, stride, padding, dilation);
    }));

    if (return_indices) {
        return torch::stack({output, indices}, 0);
    }
    return output;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &optimized_max_pool3d_cuda_forward, "Optimized Max Pool 3D forward (CUDA)");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 3.200 inst/cycle 0.000 5
Executed Ipc Elapsed 3.170 inst/cycle 0.000 5
Issue Slots Busy 79.988 % 0.000 5
Issued Ipc Active 3.200 inst/cycle 0.000 5
SM Busy 79.988 % 0.000 5
Memory Throughput 1192044536814.632 byte/second 805951976097165696.000 5
Mem Busy 35.570 % 0.001 5
Max Bandwidth 35.564 % 0.001 5
L1/TEX Hit Rate 73.850 % 0.000 5
L2 Hit Rate 36.588 % 0.000 5
Mem Pipes Busy 21.846 % 0.000 5
Warp Cycles Per Issued Instruction 17.994 cycle 0.000 5
Warp Cycles Per Executed Instruction 17.994 cycle 0.000 5
Avg. Active Threads Per Warp 31.080 0.000 5
Avg. Not Predicated Off Threads Per Warp 27.550 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 8.000 block 0.000 5
Block Limit Shared Mem 32.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 90.102 % 0.000 5
Achieved Active Warps Per SM 57.668 warp 0.000 5
Analysis Rules
Rule Description
WRN HighPipeUtilization ALU is the highest-utilized pipeline (62.0%) based on active cycles, taking into account the rates of its different instructions. It executes integer and logic operations. The pipeline is well-utilized, but might become a bottleneck if more work is added. Based on the number of executed instructions, the highest utilized pipeline (62.0%) is ALU. It executes integer and logic operations. Comparing the two, the overall pipeline utilization appears to be caused by frequent, low-latency instructions. See the Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-decoder) or hover over the pipeline name to understand the workloads handled by each pipeline. The Instruction Statistics section shows the mix of executed instructions in this kernel.
INF Occupancy This kernel's theoretical occupancy is not impacted by any block limit.
Operation / Metric Value Unit
aten::randn
CPU Time 609390.91 μs
Device Time 0.00 μs
Self CPU Time 97.40 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::normal_
CPU Time 609261.17 μs
Device Time 0.00 μs
Self CPU Time 609261.17 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::to
CPU Time 320654.09 μs
Device Time 54719.87 μs
Self CPU Time 41.69 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 2064474.59 μs
Device Time 13627.75 μs
Self CPU Time 2064474.59 μs
Self Device Time 13627.75 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void optimized_maxpool3d_kernel<float>(float const*, float*, long*, int, int, int, int, int, int, int, int, int, int, int, int)
CPU Time 0.00 μs
Device Time 2065470.46 μs
Self CPU Time 0.00 μs
Self Device Time 2065470.46 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 1787646.91 μs
Device Time 410578.34 μs
Self CPU Time 10189.85 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 1777458.68 μs
Device Time 410578.34 μs
Self CPU Time 15026.66 μs
Self Device Time 410578.34 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 410578.34 μs
Self CPU Time 0.00 μs
Self Device Time 410578.34 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed 
45305 warnings generated when compiling for host.
Suppressed 45327 warnings (45280 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:12:63 bugprone-easily-swappable-parameters
12 | __device__ __forceinline__ int compute_pool_bounds(int start, int input_size, int kernel_size, int dilation, bool is_start) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:12:67: note: the first parameter in the range is 'input_size'
12 | __device__ __forceinline__ int compute_pool_bounds(int start, int input_size, int kernel_size, int dilation, bool is_start) {
| ^~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:12:83: note: the last parameter in the range is 'kernel_size'
12 | __device__ __forceinline__ int compute_pool_bounds(int start, int input_size, int kernel_size, int dilation, bool is_start) {
| ^~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:37:43: warning: 2 adjacent parameters of 'optimized_maxpool3d_kernel' of similar type ('const int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
37 | const int input_d, const int input_h, const int input_w,
| ^~~~~~~~~~~~~~~~~~
38 | const int output_d, const int output_h, const int output_w,
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:37:53: note: the first parameter in the range is 'input_w'
37 | const int input_d, const int input_h, const int input_w,
| ^~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:38:15: note: the last parameter in the range is 'output_d'
38 | const int output_d, const int output_h, const int output_w,
| ^~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:38:45: warning: 3 adjacent parameters of 'optimized_maxpool3d_kernel' of similar type ('const int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
38 | const int output_d, const int output_h, const int output_w,
| ^~~~~~~~~~~~~~~~~~~
39 | const int kernel_size,
| ~~~~~~~~~~~~~~~~~~~~~~
40 | const int stride,
| ~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:38:55: note: the first parameter in the range is 'output_w'
38 | const int output_d, const int output_h, const int output_w,
| ^~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:40:15: note: the last parameter in the range is 'stride'
40 | const int stride,
| ^~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:41:5: warning: 2 adjacent parameters of 'optimized_maxpool3d_kernel' of similar type ('const int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
41 | const int padding,
| ^~~~~~~~~~~~~~~~~~
42 | const int dilation) {
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:41:15: note: the first parameter in the range is 'padding'
41 | const int padding,
| ^~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:42:15: note: the last parameter in the range is 'dilation'
42 | const int dilation) {
| ^~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:44:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
44 | const int idx = blockIdx.x * blockDim.x + threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:105:28: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
105 | const int batch_size = input_sizes[0];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:106:26: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
106 | const int channels = input_sizes[1];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:107:25: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
107 | const int input_d = input_sizes[2];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:108:25: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
108 | const int input_h = input_sizes[3];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:109:25: warning: narrowing conversion from 'long' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
109 | const int input_w = input_sizes[4];
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:112:9: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
112 | ceil((input_d + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:112:14: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
112 | ceil((input_d + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:113:9: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
113 | floor((input_d + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:113:15: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
113 | floor((input_d + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:115:9: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
115 | ceil((input_h + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:115:14: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
115 | ceil((input_h + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:116:9: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
116 | floor((input_h + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:116:15: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
116 | floor((input_h + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:118:9: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
118 | ceil((input_w + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:118:14: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
118 | ceil((input_w + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1) :
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:119:9: warning: narrowing conversion from 'float' to 'int' [bugprone-narrowing-conversions]
119 | floor((input_w + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:119:15: warning: narrowing conversion from 'int' to 'float' [bugprone-narrowing-conversions]
119 | floor((input_w + 2 * padding - dilation * (kernel_size - 1) - 1) / float(stride) + 1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250201_optimize_b10_s4_e0_sweep/level_1/task_43/b8_s0_optimized_maxpool3d_kernel/base/base.cu:129:5: warning: inside a lambda, '__func__' expands to the name of the function call operator; consider capturing the name of the enclosing function explicitly [bugprone-lambda-function-name]
129 | AT_DISPATCH_FLOATING_TYPES(input.scalar_type(), "optimized_max_pool3d_forward_cuda", ([&] {
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:237:34: note: expanded from macro 'AT_DISPATCH_FLOATING_TYPES'
237 | AT_DISPATCH_SWITCH(TYPE, NAME, AT_DISPATCH_CASE_FLOATING_TYPES(__VA_ARGS__))
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:233:3: note: expanded from macro 'AT_DISPATCH_CASE_FLOATING_TYPES'
233 | AT_DISPATCH_CASE(at::ScalarType::Double, __VA_ARGS__) \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:74:3: note: expanded from macro 'AT_DISPATCH_CASE'
74 | AT_PRIVATE_CASE_TYPE_USING_HINT(enum_type, scalar_t, __VA_ARGS__)
| ^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/ATen/Dispatch.h:58:7: note: expanded from macro 'AT_PRIVATE_CHECK_SELECTIVE_BUILD'
58 | AT_ERROR( \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:711:32: note: expanded from macro 'AT_ERROR'
711 | C10_EXPAND_MSVC_WORKAROUND(TORCH_CHECK(false, ::c10::str(__VA_ARGS__))); \
| ^
/home/robert_sakana_ai/miniconda3/envs/llm2cuda/lib/python3.11/site-packages/torch/include/c10/util/Exception.h:536:9: note: expanded from macro 'TORCH_CHECK'
536 | __func__, \
| ^