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12_Gemm_Multiply_LeakyReLUoptimized_thread_block_indexing_gemm_base

Level 2 • Task 12
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    multiplier: float,
    negative_slope: float,
    weight: torch.Tensor,
    bias: torch.Tensor,
) -> torch.Tensor:
    """
    Applies linear transformation, multiplies by scalar, and applies LeakyReLU.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_features)
        multiplier (float): Scalar multiplier
        negative_slope (float): Negative slope for LeakyReLU
        weight (torch.Tensor): Weight matrix of shape (out_features, in_features)
        bias (torch.Tensor): Bias vector of shape (out_features)

    Returns:
        torch.Tensor: Output tensor of shape (batch_size, out_features)
    """
    x = F.linear(x, weight, bias)
    x = x * multiplier
    x = F.leaky_relu(x, negative_slope=negative_slope)
    return x


class Model(nn.Module):
    """
    Simple model that performs a Gemm, multiplies the result, and applies LeakyReLU.
    """

    def __init__(self, in_features, out_features, multiplier, negative_slope):
        super(Model, self).__init__()
        gemm = nn.Linear(in_features, out_features)
        self.weight = gemm.weight
        self.bias = gemm.bias

    def forward(self, x, fn=module_fn):
        return fn(x, multiplier, negative_slope, self.weight, self.bias)


batch_size = 128
in_features = 1024
out_features = 512
multiplier = 2.0
negative_slope = 0.1


def get_inputs():
    return [torch.randn(batch_size, in_features)]


def get_init_inputs():
    return [in_features, out_features, multiplier, negative_slope]
import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Simple model that performs a Gemm, multiplies the result, and applies LeakyReLU.
    """
    def __init__(self, in_features, out_features, multiplier, negative_slope):
        super(Model, self).__init__()
        self.gemm = nn.Linear(in_features, out_features)
        self.multiplier = multiplier
        self.leaky_relu = nn.LeakyReLU(negative_slope)

    def forward(self, x):
        x = self.gemm(x)
        x = x * self.multiplier
        x = self.leaky_relu(x)
        return x

batch_size = 128
in_features = 1024
out_features = 512
multiplier = 2.0
negative_slope = 0.1

def get_inputs():
    return [torch.randn(batch_size, in_features)]

def get_init_inputs():
    return [in_features, out_features, multiplier, negative_slope]

Kernel Information

Related Kernels (Level 2, Task 12 • 12_Gemm_Multiply_LeakyReLU)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 12_gemm_warp_primitives_base 0.03 1.30 2.32
🥈 12_gemm_ldg_optimization_base 0.04 1.18 2.12
🥈 12_gemm_warp_vec4_edit_1_base_edit_1 0.04 1.18 2.12
🥈 12_gemm_ldg_optimization_edit_1 0.04 1.18 2.12
5 12_gemm_warp_vec4_edit_1_base_base 0.04 1.04 1.86
6 gemm_tiled_grid_edit_1 0.05 0.83 1.49
7 12_gemm_constant_memory_edit_1 0.05 0.80 1.43
8 gemm_unrolled_base 0.05 0.77 1.38
8 gemm_unrolled_edit_1 0.05 0.77 1.38
8 12_gemm_constant_memory_base 0.05 0.77 1.38
11 gemm_tiled_grid_block_32_base 0.07 0.60 1.08
12 gemm_tiled_grid_base 0.07 0.59 1.06
12 gemm_tiled_shared_base 0.07 0.59 1.06
12 gemm_tiled_grid_block_32_edit_1 0.07 0.59 1.06
15 12_gemm_tiled_coalesced_edit_1 0.07 0.58 1.05
16 gemm_tiled_streamed_base 0.07 0.56 1.00
17 optimized_gemm_leakyrelu_base 0.07 0.55 0.99
17 atomic_optimization_gemm_edit_1 0.07 0.55 0.99
17 optimized_gemm_leakyrelu_edit_1 0.07 0.55 0.99
20 optimized_thread_block_indexing_gemm_base 0.08 0.51 0.91
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>

// Tile size for shared memory blocking adjusting for better cache utilization
#define TILE_SIZE 16

// Kernel optimizing indexing for better cache utilization and warp efficiency
__global__ void module_fn_kernel_optimized_indexing(
    const float* __restrict__ x,
    const float* __restrict__ weight,
    const float* __restrict__ bias,
    float* output,
    const int batch_size,
    const int in_features,
    const int out_features,
    const float multiplier,
    const float negative_slope
) {
    extern __shared__ float tile_data[];
    float* x_tile = tile_data;
    float* weight_tile = tile_data + TILE_SIZE * TILE_SIZE;

    // Calculate thread indices
    int tx = threadIdx.x;
    int ty = threadIdx.y;

    // Calculate block indices
    int row = blockIdx.x * TILE_SIZE + tx;  // i index for batch
    int col = blockIdx.y * TILE_SIZE + ty;  // j index for out_features

    float sum = 0.0f;

    // Loop over tiles to load them into shared memory
    int tiles_count = (in_features + TILE_SIZE - 1) / TILE_SIZE;
    for (int t = 0; t < tiles_count; ++t) {
        int tiledCol = t * TILE_SIZE + ty;  // column index in x tile

        if (row < batch_size && tiledCol < in_features)
            x_tile[tx * TILE_SIZE + ty] = x[row * in_features + tiledCol];
        else
            x_tile[tx * TILE_SIZE + ty] = 0.0f;

        int tiledRow = t * TILE_SIZE + tx;  // index in the in_features dimension
        if (col < out_features && tiledRow < in_features)
            weight_tile[tx * TILE_SIZE + ty] = weight[col * in_features + tiledRow];
        else
            weight_tile[tx * TILE_SIZE + ty] = 0.0f;

        __syncthreads();

        for (int k = 0; k < TILE_SIZE; ++k) {
            sum += x_tile[tx * TILE_SIZE + k] * weight_tile[k * TILE_SIZE + ty];
        }

        __syncthreads();
    }

    if (row < batch_size && col < out_features) {
        sum += __ldg(&bias[col]);
        sum *= multiplier;
        output[row * out_features + col] = (sum > 0.0f) ? sum : sum * negative_slope;
    }
}

// Forward function exposed to PyTorch
torch::Tensor module_fn_forward(
    torch::Tensor x,
    float multiplier,
    float negative_slope,
    torch::Tensor weight,
    torch::Tensor bias
) {
    TORCH_CHECK(x.device().is_cuda(), "x must be a CUDA tensor");
    TORCH_CHECK(weight.device().is_cuda(), "weight must be a CUDA tensor");
    TORCH_CHECK(bias.device().is_cuda(), "bias must be a CUDA tensor");

    const int batch_size = x.size(0);
    const int in_features = x.size(1);
    const int out_features = weight.size(0);

    TORCH_CHECK(weight.size(1) == in_features, "Weight in_features must match x in_features");
    TORCH_CHECK(bias.size(0) == out_features, "Bias size must match weight out_features");

    auto output = torch::zeros({batch_size, out_features}, x.options());

    dim3 block(TILE_SIZE, TILE_SIZE);
    dim3 grid((batch_size + TILE_SIZE - 1) / TILE_SIZE,
              (out_features + TILE_SIZE - 1) / TILE_SIZE);

    size_t shared_mem_size = TILE_SIZE * TILE_SIZE * sizeof(float) * 2;
    module_fn_kernel_optimized_indexing<<<grid, block, shared_mem_size>>>(
        x.data_ptr<float>(),
        weight.data_ptr<float>(),
        bias.data_ptr<float>(),
        output.data_ptr<float>(),
        batch_size,
        in_features,
        out_features,
        multiplier,
        negative_slope
    );

    return output;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &module_fn_forward, "Optimized GEMM Multiply LeakyReLU with optimized indexing and cache CUDA");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.442 inst/cycle 0.000 5
Executed Ipc Elapsed 0.420 inst/cycle 0.000 5
Issue Slots Busy 11.132 % 0.000 5
Issued Ipc Active 0.446 inst/cycle 0.000 5
SM Busy 11.132 % 0.000 5
Memory Throughput 29382462352.502 byte/second 2407240353116822.500 5
Mem Busy 80.374 % 0.018 5
Max Bandwidth 26.268 % 0.001 5
L1/TEX Hit Rate 61.474 % 0.000 5
L2 Hit Rate 84.564 % 0.695 5
Mem Pipes Busy 16.818 % 0.001 5
Warp Cycles Per Issued Instruction 34.844 cycle 0.000 5
Warp Cycles Per Executed Instruction 34.898 cycle 0.001 5
Avg. Active Threads Per Warp 32.000 0.000 5
Avg. Not Predicated Off Threads Per Warp 31.970 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 8.000 block 0.000 5
Block Limit Shared Mem 21.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 24.244 % 0.000 5
Achieved Active Warps Per SM 15.516 warp 0.000 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (24.2%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 586256.19 μs
Device Time 251.65 μs
Self CPU Time 78.79 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zeros
CPU Time 4071574.68 μs
Device Time 138339.45 μs
Self CPU Time 92417.46 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 7707453.61 μs
Device Time 4635137.02 μs
Self CPU Time 197646.04 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 7509809.02 μs
Device Time 4635137.02 μs
Self CPU Time 253913.98 μs
Self Device Time 4635137.02 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 7490585.20 μs
Device Time 1854.43 μs
Self CPU Time 7490585.20 μs
Self Device Time 1854.43 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<float>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<float>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 138341.79 μs
Self CPU Time 0.00 μs
Self Device Time 138341.79 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
module_fn_kernel_optimized_indexing(float const*, float const*, float const*, float*, int, int, int, float, float)
CPU Time 0.00 μs
Device Time 4352366.56 μs
Self CPU Time 0.00 μs
Self Device Time 4352366.56 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 4496797.57 μs
Self CPU Time 0.00 μs
Self Device Time 4496797.57 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed
45292 warnings generated when compiling for host.
Suppressed 45325 warnings (45278 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:10:5 bugprone-easily-swappable-parameters
10 | const float* __restrict__ x,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
11 | const float* __restrict__ weight,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 | const float* __restrict__ bias,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:10:31: note: the first parameter in the range is 'x'
10 | const float* __restrict__ x,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:12:31: note: the last parameter in the range is 'bias'
12 | const float* __restrict__ bias,
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:16:5: warning: 2 adjacent parameters of 'module_fn_kernel_optimized_indexing' of convertible types are easily swapped by mistake [bugprone-easily-swappable-parameters]
16 | const int out_features,
| ^~~~~~~~~~~~~~~~~~~~~~~
17 | const float multiplier,
| ~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:16:15: note: the first parameter in the range is 'out_features'
16 | const int out_features,
| ^~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:17:17: note: the last parameter in the range is 'multiplier'
17 | const float multiplier,
| ^~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:17:5: note: 'const int' and 'const float' may be implicitly converted: 'const int' (as 'int') -> 'const float' (as 'float'), 'const float' (as 'float') -> 'const int' (as 'int')
17 | const float multiplier,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:22:26: warning: result of multiplication in type 'int' is used as a pointer offset after an implicit widening conversion to type 'ptrdiff_t' [bugprone-implicit-widening-of-multiplication-result]
22 | float* weight_tile = tile_data + TILE_SIZE * TILE_SIZE;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:22:38: note: make conversion explicit to silence this warning
22 | float* weight_tile = tile_data + TILE_SIZE * TILE_SIZE;
| ^
| static_cast<ptrdiff_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:6:19: note: expanded from macro 'TILE_SIZE'
6 | #define TILE_SIZE 16
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:22:38: note: perform multiplication in a wider type
22 | float* weight_tile = tile_data + TILE_SIZE * TILE_SIZE;
| ^
| static_cast<ptrdiff_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:6:19: note: expanded from macro 'TILE_SIZE'
6 | #define TILE_SIZE 16
| ^~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:25:14: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
25 | int tx = threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:26:14: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
26 | int ty = threadIdx.y;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:29:15: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
29 | int row = blockIdx.x * TILE_SIZE + tx; // i index for batch
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:30:15: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
30 | int col = blockIdx.y * TILE_SIZE + ty; // j index for out_features
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:68:19: warning: the parameter 'x' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
68 | torch::Tensor x,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:71:19: warning: the parameter 'weight' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
71 | torch::Tensor weight,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:72:19: warning: the parameter 'bias' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
72 | torch::Tensor bias
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:78:28: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
78 | const int batch_size = x.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:79:29: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
79 | const int in_features = x.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:80:30: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
80 | const int out_features = weight.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:91:30: warning: performing an implicit widening conversion to type 'unsigned long' of a multiplication performed in type 'int' [bugprone-implicit-widening-of-multiplication-result]
91 | size_t shared_mem_size = TILE_SIZE * TILE_SIZE * sizeof(float) * 2;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:6:19: note: expanded from macro 'TILE_SIZE'
6 | #define TILE_SIZE 16
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:91:30: note: make conversion explicit to silence this warning
91 | size_t shared_mem_size = TILE_SIZE * TILE_SIZE * sizeof(float) * 2;
| ^
| static_cast<unsigned long>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:6:19: note: expanded from macro 'TILE_SIZE'
6 | #define TILE_SIZE 16
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:91:30: note: perform multiplication in a wider type
91 | size_t shared_mem_size = TILE_SIZE * TILE_SIZE * sizeof(float) * 2;
| ^
| static_cast<long>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_12/b10_s0_optimized_thread_block_indexing_gemm/base/base.cu:6:19: note: expanded from macro 'TILE_SIZE'
6 | #define TILE_SIZE 16
| ^~