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12_Gemm_Multiply_LeakyReLUatomic_optimization_gemm_edit_1

Level 2 • Task 12
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    multiplier: float,
    negative_slope: float,
    weight: torch.Tensor,
    bias: torch.Tensor,
) -> torch.Tensor:
    """
    Applies linear transformation, multiplies by scalar, and applies LeakyReLU.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_features)
        multiplier (float): Scalar multiplier
        negative_slope (float): Negative slope for LeakyReLU
        weight (torch.Tensor): Weight matrix of shape (out_features, in_features)
        bias (torch.Tensor): Bias vector of shape (out_features)

    Returns:
        torch.Tensor: Output tensor of shape (batch_size, out_features)
    """
    x = F.linear(x, weight, bias)
    x = x * multiplier
    x = F.leaky_relu(x, negative_slope=negative_slope)
    return x


class Model(nn.Module):
    """
    Simple model that performs a Gemm, multiplies the result, and applies LeakyReLU.
    """

    def __init__(self, in_features, out_features, multiplier, negative_slope):
        super(Model, self).__init__()
        gemm = nn.Linear(in_features, out_features)
        self.weight = gemm.weight
        self.bias = gemm.bias

    def forward(self, x, fn=module_fn):
        return fn(x, multiplier, negative_slope, self.weight, self.bias)


batch_size = 128
in_features = 1024
out_features = 512
multiplier = 2.0
negative_slope = 0.1


def get_inputs():
    return [torch.randn(batch_size, in_features)]


def get_init_inputs():
    return [in_features, out_features, multiplier, negative_slope]
import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Simple model that performs a Gemm, multiplies the result, and applies LeakyReLU.
    """
    def __init__(self, in_features, out_features, multiplier, negative_slope):
        super(Model, self).__init__()
        self.gemm = nn.Linear(in_features, out_features)
        self.multiplier = multiplier
        self.leaky_relu = nn.LeakyReLU(negative_slope)

    def forward(self, x):
        x = self.gemm(x)
        x = x * self.multiplier
        x = self.leaky_relu(x)
        return x

batch_size = 128
in_features = 1024
out_features = 512
multiplier = 2.0
negative_slope = 0.1

def get_inputs():
    return [torch.randn(batch_size, in_features)]

def get_init_inputs():
    return [in_features, out_features, multiplier, negative_slope]

Kernel Information

Related Kernels (Level 2, Task 12 • 12_Gemm_Multiply_LeakyReLU)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 12_gemm_warp_primitives_base 0.03 1.30 2.32
🥈 12_gemm_ldg_optimization_base 0.04 1.18 2.12
🥈 12_gemm_warp_vec4_edit_1_base_edit_1 0.04 1.18 2.12
🥈 12_gemm_ldg_optimization_edit_1 0.04 1.18 2.12
5 12_gemm_warp_vec4_edit_1_base_base 0.04 1.04 1.86
6 gemm_tiled_grid_edit_1 0.05 0.83 1.49
7 12_gemm_constant_memory_edit_1 0.05 0.80 1.43
8 gemm_unrolled_base 0.05 0.77 1.38
8 gemm_unrolled_edit_1 0.05 0.77 1.38
8 12_gemm_constant_memory_base 0.05 0.77 1.38
11 gemm_tiled_grid_block_32_base 0.07 0.60 1.08
12 gemm_tiled_grid_base 0.07 0.59 1.06
12 gemm_tiled_shared_base 0.07 0.59 1.06
12 gemm_tiled_grid_block_32_edit_1 0.07 0.59 1.06
15 12_gemm_tiled_coalesced_edit_1 0.07 0.58 1.05
16 gemm_tiled_streamed_base 0.07 0.56 1.00
17 optimized_gemm_leakyrelu_base 0.07 0.55 0.99
17 atomic_optimization_gemm_edit_1 0.07 0.55 0.99
17 optimized_gemm_leakyrelu_edit_1 0.07 0.55 0.99
20 optimized_thread_block_indexing_gemm_base 0.08 0.51 0.91
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>

#define BLOCK_SIZE 16

// CUDA kernel using shared memory tiling for GEMM followed by bias addition, scaling and LeakyReLU activation
__global__ void gemm_shared_kernel_atomic(
    const float* __restrict__ x,
    const float* __restrict__ weight,
    const float* __restrict__ bias,
    float* __restrict__ output,
    const int batch_size,
    const int in_features,
    const int out_features,
    const float multiplier,
    const float negative_slope
) {
    __shared__ float s_x[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ float s_w[BLOCK_SIZE][BLOCK_SIZE];

    const int tx = threadIdx.x;
    const int ty = threadIdx.y;
    const int row = blockIdx.x * BLOCK_SIZE + tx;
    const int col = blockIdx.y * BLOCK_SIZE + ty;
    float sum = 0.0f;

    // Calculate number of tiles and base indices
    const int numTiles = (in_features + BLOCK_SIZE - 1) / BLOCK_SIZE;
    const int row_base = row * in_features;
    const int col_base = col * in_features;

    for (int t = 0; t < numTiles; t++) {
        const int tile_idx = t * BLOCK_SIZE;
        
        // Load input tile - coalesced access
        if (row < batch_size && (tile_idx + ty) < in_features) {
            s_x[tx][ty] = x[row_base + tile_idx + ty];
        } else {
            s_x[tx][ty] = 0.0f;
        }

        // Load weight tile with transpose - coalesced access
        if (col < out_features && (tile_idx + tx) < in_features) {
            s_w[ty][tx] = weight[col_base + tile_idx + tx];
        } else {
            s_w[ty][tx] = 0.0f;
        }

        __syncthreads();

        #pragma unroll
        for (int k = 0; k < BLOCK_SIZE; k++) {
            sum += s_x[tx][k] * s_w[ty][k];  // Notice the transposed access
        }
        __syncthreads();
    }

    if (row < batch_size && col < out_features) {
        sum = (sum + bias[col]) * multiplier;
        output[row * out_features + col] = (sum > 0.0f) ? sum : sum * negative_slope;
    }
}

// Host function that sets up kernel execution
torch::Tensor module_fn_forward(
    torch::Tensor x,
    float multiplier,
    float negative_slope,
    torch::Tensor weight,
    torch::Tensor bias
) {
    TORCH_CHECK(x.device().is_cuda(), "x must be a CUDA tensor");
    TORCH_CHECK(weight.device().is_cuda(), "weight must be a CUDA tensor");
    TORCH_CHECK(bias.device().is_cuda(), "bias must be a CUDA tensor");

    const int batch_size = x.size(0);
    const int in_features = x.size(1);
    const int out_features = weight.size(0);

    TORCH_CHECK(weight.size(1) == in_features, "Weight in_features must match x in_features");
    TORCH_CHECK(bias.size(0) == out_features, "Bias size must match weight out_features");

    auto output = torch::zeros({batch_size, out_features}, x.options());

    dim3 block(BLOCK_SIZE, BLOCK_SIZE);
    dim3 grid((batch_size + BLOCK_SIZE - 1) / BLOCK_SIZE, (out_features + BLOCK_SIZE - 1) / BLOCK_SIZE);

    gemm_shared_kernel_atomic<<<grid, block>>>(
        x.data_ptr<float>(),
        weight.data_ptr<float>(),
        bias.data_ptr<float>(),
        output.data_ptr<float>(),
        batch_size,
        in_features,
        out_features,
        multiplier,
        negative_slope
    );

    return output;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &module_fn_forward, "Module function forward CUDA with shared memory tiling and atomic operations");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.400 inst/cycle 0.000 5
Executed Ipc Elapsed 0.362 inst/cycle 0.000 5
Issue Slots Busy 10.062 % 0.002 5
Issued Ipc Active 0.400 inst/cycle 0.000 5
SM Busy 10.062 % 0.002 5
Memory Throughput 30967573035.752 byte/second 56337354977185408.000 5
Mem Busy 73.632 % 0.325 5
Max Bandwidth 21.872 % 0.029 5
L1/TEX Hit Rate 61.504 % 0.000 5
L2 Hit Rate 87.114 % 2.303 5
Mem Pipes Busy 8.894 % 0.005 5
Warp Cycles Per Issued Instruction 38.562 cycle 0.057 5
Warp Cycles Per Executed Instruction 38.636 cycle 0.057 5
Avg. Active Threads Per Warp 32.000 0.000 5
Avg. Not Predicated Off Threads Per Warp 31.960 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 8.000 block 0.000 5
Block Limit Shared Mem 21.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 24.250 % 0.000 5
Achieved Active Warps Per SM 15.520 warp 0.000 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (24.2%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 210794.92 μs
Device Time 162.27 μs
Self CPU Time 76.84 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zeros
CPU Time 4302864.15 μs
Device Time 84702.22 μs
Self CPU Time 105059.45 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 7633370.12 μs
Device Time 4726930.75 μs
Self CPU Time 199967.38 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 7433405.51 μs
Device Time 4726930.75 μs
Self CPU Time 251034.68 μs
Self Device Time 4726853.08 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 7409298.12 μs
Device Time 205987.81 μs
Self CPU Time 7409298.12 μs
Self Device Time 205987.81 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
gemm_shared_kernel_atomic(float const*, float const*, float const*, float*, int, int, int, float, float)
CPU Time 0.00 μs
Device Time 4124785.96 μs
Self CPU Time 0.00 μs
Self Device Time 4124785.96 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 4642541.33 μs
Self CPU Time 0.00 μs
Self Device Time 4642541.33 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed
45290 warnings generated when compiling for host.
Suppressed 45325 warnings (45278 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:9:5 bugprone-easily-swappable-parameters
9 | const float* __restrict__ x,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 | const float* __restrict__ weight,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
11 | const float* __restrict__ bias,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:9:31: note: the first parameter in the range is 'x'
9 | const float* __restrict__ x,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:11:31: note: the last parameter in the range is 'bias'
11 | const float* __restrict__ bias,
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:15:5: warning: 2 adjacent parameters of 'gemm_shared_kernel_atomic' of convertible types are easily swapped by mistake [bugprone-easily-swappable-parameters]
15 | const int out_features,
| ^~~~~~~~~~~~~~~~~~~~~~~
16 | const float multiplier,
| ~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:15:15: note: the first parameter in the range is 'out_features'
15 | const int out_features,
| ^~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:16:17: note: the last parameter in the range is 'multiplier'
16 | const float multiplier,
| ^~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:16:5: note: 'const int' and 'const float' may be implicitly converted: 'const int' (as 'int') -> 'const float' (as 'float'), 'const float' (as 'float') -> 'const int' (as 'int')
16 | const float multiplier,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:22:20: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
22 | const int tx = threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:23:20: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
23 | const int ty = threadIdx.y;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:24:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
24 | const int row = blockIdx.x * BLOCK_SIZE + tx;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:25:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
25 | const int col = blockIdx.y * BLOCK_SIZE + ty;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:67:19: warning: the parameter 'x' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
67 | torch::Tensor x,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:70:19: warning: the parameter 'weight' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
70 | torch::Tensor weight,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:71:19: warning: the parameter 'bias' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
71 | torch::Tensor bias
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:77:28: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
77 | const int batch_size = x.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:78:29: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
78 | const int in_features = x.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250208_optimize_b5_s4_e1_sweep/level_2/task_12/b3_s0_atomic_optimization_gemm/edit_1/edit_1.cu:79:30: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
79 | const int out_features = weight.size(0);
| ^