import torch
import torch.nn as nn
import torch.nn.functional as F
def module_fn(
x: torch.Tensor,
multiplier: float,
negative_slope: float,
weight: torch.Tensor,
bias: torch.Tensor,
) -> torch.Tensor:
"""
Applies linear transformation, multiplies by scalar, and applies LeakyReLU.
Args:
x (torch.Tensor): Input tensor of shape (batch_size, in_features)
multiplier (float): Scalar multiplier
negative_slope (float): Negative slope for LeakyReLU
weight (torch.Tensor): Weight matrix of shape (out_features, in_features)
bias (torch.Tensor): Bias vector of shape (out_features)
Returns:
torch.Tensor: Output tensor of shape (batch_size, out_features)
"""
x = F.linear(x, weight, bias)
x = x * multiplier
x = F.leaky_relu(x, negative_slope=negative_slope)
return x
class Model(nn.Module):
"""
Simple model that performs a Gemm, multiplies the result, and applies LeakyReLU.
"""
def __init__(self, in_features, out_features, multiplier, negative_slope):
super(Model, self).__init__()
gemm = nn.Linear(in_features, out_features)
self.weight = gemm.weight
self.bias = gemm.bias
def forward(self, x, fn=module_fn):
return fn(x, multiplier, negative_slope, self.weight, self.bias)
batch_size = 128
in_features = 1024
out_features = 512
multiplier = 2.0
negative_slope = 0.1
def get_inputs():
return [torch.randn(batch_size, in_features)]
def get_init_inputs():
return [in_features, out_features, multiplier, negative_slope]
import torch
import torch.nn as nn
class Model(nn.Module):
"""
Simple model that performs a Gemm, multiplies the result, and applies LeakyReLU.
"""
def __init__(self, in_features, out_features, multiplier, negative_slope):
super(Model, self).__init__()
self.gemm = nn.Linear(in_features, out_features)
self.multiplier = multiplier
self.leaky_relu = nn.LeakyReLU(negative_slope)
def forward(self, x):
x = self.gemm(x)
x = x * self.multiplier
x = self.leaky_relu(x)
return x
batch_size = 128
in_features = 1024
out_features = 512
multiplier = 2.0
negative_slope = 0.1
def get_inputs():
return [torch.randn(batch_size, in_features)]
def get_init_inputs():
return [in_features, out_features, multiplier, negative_slope]#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#define BLOCK_SIZE 16
// CUDA kernel implementing GEMM with shared memory tiling and explicit loop unrolling
__global__ void gemm_unrolled_kernel(
const float* __restrict__ x, // Input: [batch_size x in_features]
const float* __restrict__ weight, // Weight: [out_features x in_features]
const float* __restrict__ bias, // Bias: [out_features]
float* __restrict__ output, // Output: [batch_size x out_features]
const int batch_size,
const int in_features,
const int out_features,
const float multiplier,
const float negative_slope
) {
// Calculate global row and column indices
int row = blockIdx.x * BLOCK_SIZE + threadIdx.x;
int col = blockIdx.y * BLOCK_SIZE + threadIdx.y;
float sum = 0.0f;
// Shared memory tiles for x and weight, with added padding to avoid bank conflicts
__shared__ float s_x[BLOCK_SIZE][BLOCK_SIZE + 1];
__shared__ float s_w[BLOCK_SIZE][BLOCK_SIZE + 1];
// Determine the number of tiles needed along the in_features dimension
int numTiles = (in_features + BLOCK_SIZE - 1) / BLOCK_SIZE;
// Unroll the tiling loop to reduce loop overhead
#pragma unroll
for (int t = 0; t < numTiles; t++) {
int tiled_index = t * BLOCK_SIZE;
// Load a tile from input x into shared memory, use __ldg for potential cache load hints
if (row < batch_size && (tiled_index + threadIdx.y) < in_features) {
s_x[threadIdx.x][threadIdx.y] = __ldg(&x[row * in_features + tiled_index + threadIdx.y]);
} else {
s_x[threadIdx.x][threadIdx.y] = 0.0f;
}
// Load a tile from weight, transpose it for better coalescing
if (col < out_features && (tiled_index + threadIdx.x) < in_features) {
s_w[threadIdx.y][threadIdx.x] = __ldg(&weight[col * in_features + tiled_index + threadIdx.x]);
} else {
s_w[threadIdx.y][threadIdx.x] = 0.0f;
}
__syncthreads();
// Unroll the inner loop fully given the BLOCK_SIZE is known at compile time
#pragma unroll
for (int k = 0; k < BLOCK_SIZE; k++) {
sum = __fmaf_rn(s_x[threadIdx.x][k], s_w[threadIdx.y][k], sum);
}
__syncthreads();
}
// Write the computed value to the output, fusing bias addition, scaling and LeakyReLU
if (row < batch_size && col < out_features) {
float result = (sum + bias[col]) * multiplier;
result = (result > 0.0f) ? result : result * negative_slope;
output[row * out_features + col] = result;
}
}
// Host function to set up kernel execution
torch::Tensor module_fn_forward(
torch::Tensor x,
float multiplier,
float negative_slope,
torch::Tensor weight,
torch::Tensor bias
) {
TORCH_CHECK(x.device().is_cuda(), "x must be a CUDA tensor");
TORCH_CHECK(weight.device().is_cuda(), "weight must be a CUDA tensor");
TORCH_CHECK(bias.device().is_cuda(), "bias must be a CUDA tensor");
const int batch_size = x.size(0);
const int in_features = x.size(1);
const int out_features = weight.size(0);
TORCH_CHECK(weight.size(1) == in_features, "Weight in_features must match x in_features");
TORCH_CHECK(bias.size(0) == out_features, "Bias size must match weight out_features");
auto output = torch::zeros({batch_size, out_features}, x.options());
dim3 block(BLOCK_SIZE, BLOCK_SIZE);
dim3 grid(
(batch_size + BLOCK_SIZE - 1) / BLOCK_SIZE,
(out_features + BLOCK_SIZE - 1) / BLOCK_SIZE
);
gemm_unrolled_kernel<<<grid, block>>>(
x.data_ptr<float>(),
weight.data_ptr<float>(),
bias.data_ptr<float>(),
output.data_ptr<float>(),
batch_size,
in_features,
out_features,
multiplier,
negative_slope
);
return output;
}
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
m.def("forward", &module_fn_forward, "GEMM forward CUDA kernel with explicit loop unrolling");
}
| Metric | Value | Unit | Variance | Samples |
|---|---|---|---|---|
| Executed Ipc Active | 0.882 | inst/cycle | 0.000 | 5 |
| Executed Ipc Elapsed | 0.838 | inst/cycle | 0.000 | 5 |
| Issue Slots Busy | 22.058 | % | 0.006 | 5 |
| Issued Ipc Active | 0.882 | inst/cycle | 0.000 | 5 |
| SM Busy | 24.670 | % | 0.007 | 5 |
| Memory Throughput | 48859469332.602 | byte/second | 40471317343999936.000 | 5 |
| Mem Busy | 63.874 | % | 0.072 | 5 |
| Max Bandwidth | 43.880 | % | 0.035 | 5 |
| L1/TEX Hit Rate | 61.502 | % | 0.000 | 5 |
| L2 Hit Rate | 86.664 | % | 2.742 | 5 |
| Mem Pipes Busy | 42.016 | % | 0.031 | 5 |
| Warp Cycles Per Issued Instruction | 17.554 | cycle | 0.006 | 5 |
| Warp Cycles Per Executed Instruction | 17.576 | cycle | 0.006 | 5 |
| Avg. Active Threads Per Warp | 32.000 | 0.000 | 5 | |
| Avg. Not Predicated Off Threads Per Warp | 31.980 | 0.000 | 5 | |
| Max Active Clusters | 0.000 | cluster | 0.000 | 5 |
| Max Cluster Size | 8.000 | block | 0.000 | 5 |
| Overall GPU Occupancy | 0.000 | % | 0.000 | 5 |
| Cluster Occupancy | 0.000 | % | 0.000 | 5 |
| Block Limit SM | 32.000 | block | 0.000 | 5 |
| Block Limit Registers | 8.000 | block | 0.000 | 5 |
| Block Limit Shared Mem | 20.000 | block | 0.000 | 5 |
| Block Limit Warps | 8.000 | block | 0.000 | 5 |
| Theoretical Active Warps per SM | 64.000 | warp | 0.000 | 5 |
| Theoretical Occupancy | 100.000 | % | 0.000 | 5 |
| Achieved Occupancy | 24.164 | % | 0.000 | 5 |
| Achieved Active Warps Per SM | 15.464 | warp | 0.000 | 5 |
| Rule | Description |
|---|---|
| WRN HighPipeUtilization | All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details. |
| INF CPIStall | Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason. |
| WRN Occupancy | This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (24.2%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy. |
| Operation / Metric | Value | Unit |
|---|---|---|
| aten::to | ||
| CPU Time | 908693.64 | μs |
| Device Time | 144.99 | μs |
| Self CPU Time | 75.16 | μs |
| Self Device Time | 0.00 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| aten::zeros | ||
| CPU Time | 4687048.86 | μs |
| Device Time | 95887.54 | μs |
| Self CPU Time | 107597.09 | μs |
| Self Device Time | 0.00 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| aten::zero_ | ||
| CPU Time | 7000562.14 | μs |
| Device Time | 5336089.84 | μs |
| Self CPU Time | 226670.34 | μs |
| Self Device Time | 0.00 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| aten::fill_ | ||
| CPU Time | 6773894.03 | μs |
| Device Time | 5336089.84 | μs |
| Self CPU Time | 308820.89 | μs |
| Self Device Time | 5336089.84 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| cudaLaunchKernel | ||
| CPU Time | 6776227.46 | μs |
| Device Time | 1838.98 | μs |
| Self CPU Time | 6776227.46 | μs |
| Self Device Time | 1838.98 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| gemm_unrolled_kernel(float const*, float const*, float const*, float*, int, int, int, float, float) | ||
| CPU Time | 0.00 | μs |
| Device Time | 3232981.45 | μs |
| Self CPU Time | 0.00 | μs |
| Self Device Time | 3232981.45 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| cudaEventRecord | ||
| CPU Time | 168226.95 | μs |
| Device Time | 230597.60 | μs |
| Self CPU Time | 168226.95 | μs |
| Self Device Time | 230597.60 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
| void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>) | ||
| CPU Time | 0.00 | μs |
| Device Time | 5240202.30 | μs |
| Self CPU Time | 0.00 | μs |
| Self Device Time | 5240202.30 | μs |
| CPU Memory Usage | 0 | B |
| Device Memory Usage | 0 | B |
| Self CPU Memory Usage | 0 | B |
| Self Device Memory Usage | 0 | B |
45288 warnings generated when compiling for host. Suppressed 45325 warnings (45278 in non-user code, 47 NOLINT). Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.