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55_Matmul_MaxPool_Sum_Scale • optimized_shared_warp_base

Level 2 • Task 55
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    kernel_size: int,
    scale_factor: float,
    weight: torch.Tensor,
    bias: torch.Tensor,
) -> torch.Tensor:
    """
    Performs matrix multiplication, max pooling, sum, and scaling.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_features)
        kernel_size (int): Size of max pooling kernel
        scale_factor (float): Factor to scale the output by
        weight (torch.Tensor): Weight matrix of shape (out_features, in_features)
        bias (torch.Tensor): Bias vector of shape (out_features)

    Returns:
        torch.Tensor: Output tensor of shape (batch_size,)
    """
    x = F.linear(x, weight, bias)
    x = F.max_pool1d(x.unsqueeze(1), kernel_size).squeeze(1)
    x = torch.sum(x, dim=1)
    x = x * scale_factor
    return x


class Model(nn.Module):
    """
    Model that performs matrix multiplication, max pooling, sum, and scaling.
    """

    def __init__(self, in_features, out_features, kernel_size, scale_factor):
        super(Model, self).__init__()
        gemm = nn.Linear(in_features, out_features)
        self.weight = nn.Parameter(gemm.weight)
        self.bias = nn.Parameter(gemm.bias)

    def forward(self, x, kernel_size, scale_factor, fn=module_fn):
        return fn(x, kernel_size, scale_factor, self.weight, self.bias)


batch_size = 128
in_features = 10
out_features = 5
kernel_size = 2
scale_factor = 0.5


def get_inputs():
    return [torch.randn(batch_size, in_features), kernel_size, scale_factor]


def get_init_inputs():
    return [in_features, out_features, kernel_size, scale_factor]

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Model that performs matrix multiplication, max pooling, sum, and scaling.
    """
    def __init__(self, in_features, out_features, kernel_size, scale_factor):
        super(Model, self).__init__()
        self.matmul = nn.Linear(in_features, out_features)
        self.max_pool = nn.MaxPool1d(kernel_size)
        self.scale_factor = scale_factor

    def forward(self, x):
        """
        Args:
            x (torch.Tensor): Input tensor of shape (batch_size, in_features).

        Returns:
            torch.Tensor: Output tensor of shape (batch_size, out_features).
        """
        x = self.matmul(x)
        x = self.max_pool(x.unsqueeze(1)).squeeze(1)
        x = torch.sum(x, dim=1)
        x = x * self.scale_factor
        return x

batch_size = 128
in_features = 10
out_features = 5
kernel_size = 2
scale_factor = 0.5

def get_inputs():
    return [torch.randn(batch_size, in_features)]

def get_init_inputs():
    return [in_features, out_features, kernel_size, scale_factor]
Download Evaluation Download PyTorch Download CUDA Download Profiles

Kernel Information

Operation Name 55_Matmul_MaxPool_Sum_Scale
Level ID 2
Task ID 55
Kernel Name optimized_shared_warp_base
CUDA Speedup (Native) 3.728x
CUDA Speedup (Compile) 2.232x
CUDA Runtime 0.007 ms
PyTorch Runtime (Native) 0.026 ms
PyTorch Runtime (Compile) 0.016 ms
Correct True
Max Diff (vs. Reference) 0.000000
Model o3-mini-2025-01-31
Temperature 1.00
View Experiment Progress Details

Related Kernels (Level 2, Task 55 • 55_Matmul_MaxPool_Sum_Scale)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 optimized_shared_warp_base 0.01 3.73 2.23
🥇 smem_accel_base 0.01 3.73 2.23
🥇 indexing_optimized_kernel_base 0.01 3.73 2.23
🥇 warp_divergence_min_optimized_base 0.01 3.73 2.23
🥇 divergence_free_warp_base_base 0.01 3.73 2.23
🥇 optimized_divergence_free_kernel_base 0.01 3.73 2.23
🥇 min_warp_div_kernel_base 0.01 3.73 2.23
🥇 optimized_reduction_shfl_base 0.01 3.73 2.23
🥇 blocksize_tuning_opt_base 0.01 3.73 2.23
🥇 optimized_warp_shared_kernel_base 0.01 3.73 2.23
🥇 fused_divergence_base 0.01 3.73 2.23
🥇 optimized_hybrid_matmul_pool_base 0.01 3.73 2.23
🥇 optimized_hybrid_kernel_base 0.01 3.73 2.23
🥇 evenly_distributed_kernel_base 0.01 3.73 2.23
🥇 warp_reduction_opt_kernel_base_base 0.01 3.73 2.23
🥇 unrolled_matmul_pool_base_base 0.01 3.73 2.23
🥇 hybrid_min_sync_kernel_base 0.01 3.73 2.23
🥇 uniform_no_div_kernel_base 0.01 3.73 2.23
🥇 shared_warp_optimized_base 0.01 3.73 2.23
🥇 optimized_divergence_free_kernel_base 0.01 3.73 2.23 
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>

// Optimized kernel using shared memory and warp-level primitives for reductions

// Kernel applies: 1) F.linear(x, weight, bias)
//                2) F.max_pool1d on each kernel_size segment of the resulting vector
//                3) Sum of pooled max values
//                4) Scale the sum by scale_factor
// Each block processes one sample (batch element) and employs multiple threads

__global__ void optimized_kernel(
    const float* __restrict__ x,
    const float* __restrict__ weight,
    const float* __restrict__ bias,
    float* __restrict__ output,
    int B,      // batch size
    int inF,    // number of input features
    int outF,   // number of output features
    int kernel_size,
    float scale_factor
) {
    int b = blockIdx.x;
    if (b >= B) return;

    // Pointer to shared memory: used to store the linear layer outputs (size = outF)
    extern __shared__ float sdata[];  // sdata[0..outF-1]

    // Step 1: Compute F.linear: for each output feature j, compute dot product of x[b] and weight[j] plus bias
    // Distribute the computation across threads in the block
    for (int j = threadIdx.x; j < outF; j += blockDim.x) {
        float acc = bias[j];
        int x_offset = b * inF;
        int w_offset = j * inF;
        for (int i = 0; i < inF; i++) {
            acc += x[x_offset + i] * weight[w_offset + i];
        }
        sdata[j] = acc;
    }
    __syncthreads();

    // Step 2: Pooling - divide the output vector (of length outF) into segments of length 'kernel_size'
    // and compute the maximum within each segment
    int pooled_len = 0;
    if (outF >= kernel_size) {
        pooled_len = 1 + (outF - kernel_size) / kernel_size;
    }

    // Each thread processes multiple pooling segments in a strided loop
    float thread_pool_sum = 0.0f;
    for (int seg = threadIdx.x; seg < pooled_len; seg += blockDim.x) {
        int start = seg * kernel_size;
        float max_val = sdata[start];
        for (int j = 1; j < kernel_size; j++) {
            float tmp = sdata[start + j];
            if (tmp > max_val) {
                max_val = tmp;
            }
        }
        thread_pool_sum += max_val;
    }

    // Step 3: Intra-block reduction of thread_pool_sum using warp-level primitives
    // First, perform warp-level reduction using __shfl_down_sync
    unsigned int mask = 0xffffffff;
    for (int offset = warpSize / 2; offset > 0; offset /= 2) {
        thread_pool_sum += __shfl_down_sync(mask, thread_pool_sum, offset);
    }

    // Each warp's lane 0 will store its reduced sum into shared memory
    __shared__ float warp_sums[32];  // sufficient for up to 1024 threads (32 warps)
    int lane = threadIdx.x & (warpSize - 1);
    int warpId = threadIdx.x / warpSize;
    if (lane == 0) {
        warp_sums[warpId] = thread_pool_sum;
    }
    __syncthreads();

    // Final reduction: use the first warp to reduce the sums from each warp
    // Compute number of warps participating
    int numWarps = blockDim.x / warpSize;
    float final_sum = 0.0f;
    if (threadIdx.x < 32) {
        // Load value if this thread is within the number of warps, else set to 0
        float val = (threadIdx.x < numWarps) ? warp_sums[threadIdx.x] : 0.0f;
        for (int offset = 16; offset > 0; offset /= 2) {
            val += __shfl_down_sync(mask, val, offset);
        }
        if (threadIdx.x == 0) {
            final_sum = val;
            // Step 4: Scale the result and write output
            output[b] = final_sum * scale_factor;
        }
    }
}

// Forward function callable from Python
at::Tensor forward(
    at::Tensor x,
    int64_t kernel_size,
    double scale_factor,
    at::Tensor weight,
    at::Tensor bias
) {
    TORCH_CHECK(x.is_cuda(), "x must be a CUDA tensor");
    TORCH_CHECK(weight.is_cuda(), "weight must be a CUDA tensor");
    TORCH_CHECK(bias.is_cuda(), "bias must be a CUDA tensor");
    TORCH_CHECK(x.dim() == 2, "x must have shape (batch_size, in_features)");
    TORCH_CHECK(weight.dim() == 2, "weight must have shape (out_features, in_features)");
    TORCH_CHECK(bias.dim() == 1, "bias must have shape (out_features)");

    const auto B = x.size(0);
    const auto inF = x.size(1);
    const auto outF = weight.size(0);

    // Prepare output tensor
    auto out = torch::empty({B}, x.options());

    // Launch the kernel: one block per sample, 256 threads per block
    // Allocate shared memory equal to outF * sizeof(float) for storing intermediate F.linear outputs
    int threads = 256;
    size_t sharedMemSize = outF * sizeof(float);
    optimized_kernel<<<B, threads, sharedMemSize>>>(
        x.data_ptr<float>(),
        weight.data_ptr<float>(),
        bias.data_ptr<float>(),
        out.data_ptr<float>(),
        B,
        inF,
        outF,
        static_cast<int>(kernel_size),
        static_cast<float>(scale_factor)
    );

    return out;
}

// PyBind11 module registration
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &forward, "CUDA forward for optimized_kernel");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.300 inst/cycle 0.000 5
Executed Ipc Elapsed 0.146 inst/cycle 0.000 5
Issue Slots Busy 7.604 % 0.002 5
Issued Ipc Active 0.304 inst/cycle 0.000 5
SM Busy 7.604 % 0.002 5
Memory Throughput 3337406457.744 byte/second 2816216539905545.000 5
Mem Busy 6.854 % 0.007 5
Max Bandwidth 3.616 % 0.002 5
L1/TEX Hit Rate 82.260 % 0.000 5
L2 Hit Rate 104.692 % 0.012 5
Mem Pipes Busy 2.080 % 0.000 5
Warp Cycles Per Issued Instruction 23.938 cycle 0.518 5
Warp Cycles Per Executed Instruction 24.366 cycle 0.534 5
Avg. Active Threads Per Warp 23.930 0.000 5
Avg. Not Predicated Off Threads Per Warp 21.860 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 8.000 block 0.000 5
Block Limit Shared Mem 25.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 11.252 % 0.000 5
Achieved Active Warps Per SM 7.204 warp 0.000 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN ThreadDivergence Instructions are executed in warps, which are groups of 32 threads. Optimal instruction throughput is achieved if all 32 threads of a warp execute the same instruction. The chosen launch configuration, early thread completion, and divergent flow control can significantly lower the number of active threads in a warp per cycle. This kernel achieves an average of 23.9 threads being active per cycle. This is further reduced to 21.9 threads per warp due to predication. The compiler may use predication to avoid an actual branch. Instead, all instructions are scheduled, but a per-thread condition code or predicate controls which threads execute the instructions. Try to avoid different execution paths within a warp when possible. In addition, ensure your kernel makes use of Independent Thread Scheduling, which allows a warp to reconverge after a data-dependent conditional block by explicitly calling __syncwarp().
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (11.2%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 515552.35 μs
Device Time 5.60 μs
Self CPU Time 77.29 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 515475.06 μs
Device Time 5.60 μs
Self CPU Time 119.24 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 515224.46 μs
Device Time 0.00 μs
Self CPU Time 114.32 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 514320.22 μs
Device Time 0.00 μs
Self CPU Time 514320.22 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 516198.41 μs
Device Time 22110.55 μs
Self CPU Time 516198.41 μs
Self Device Time 22110.55 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
optimized_kernel(float const*, float const*, float const*, float*, int, int, int, int, float)
CPU Time 0.00 μs
Device Time 35400.16 μs
Self CPU Time 0.00 μs
Self Device Time 35400.16 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaEventRecord
CPU Time 18281.75 μs
Device Time 43991.02 μs
Self CPU Time 18281.75 μs
Self Device Time 43991.02 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 67519.00 μs
Device Time 657011.14 μs
Self CPU Time 14033.08 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 53489.74 μs
Device Time 657011.14 μs
Self CPU Time 18557.34 μs
Self Device Time 657011.14 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 657011.14 μs
Self CPU Time 0.00 μs
Self Device Time 657011.14 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed 
45295 warnings generated when compiling for host.
Suppressed 45325 warnings (45278 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:15:5 bugprone-easily-swappable-parameters
15 | const float* __restrict__ weight,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
16 | const float* __restrict__ bias,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:15:31: note: the first parameter in the range is 'weight'
15 | const float* __restrict__ weight,
| ^~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:16:31: note: the last parameter in the range is 'bias'
16 | const float* __restrict__ bias,
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:18:5: warning: 3 adjacent parameters of 'optimized_kernel' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
18 | int B, // batch size
| ^~~~~~~~~~~~~~~~~~~~~~~~~
19 | int inF, // number of input features
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
20 | int outF, // number of output features
| ~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:18:9: note: the first parameter in the range is 'B'
18 | int B, // batch size
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:20:9: note: the last parameter in the range is 'outF'
20 | int outF, // number of output features
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:21:5: warning: 2 adjacent parameters of 'optimized_kernel' of convertible types are easily swapped by mistake [bugprone-easily-swappable-parameters]
21 | int kernel_size,
| ^~~~~~~~~~~~~~~~
22 | float scale_factor
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:21:9: note: the first parameter in the range is 'kernel_size'
21 | int kernel_size,
| ^~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:22:11: note: the last parameter in the range is 'scale_factor'
22 | float scale_factor
| ^~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:22:5: note: 'int' and 'float' may be implicitly converted
22 | float scale_factor
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:24:13: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
24 | int b = blockIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:32:18: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
32 | for (int j = threadIdx.x; j < outF; j += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:32:46: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
32 | for (int j = threadIdx.x; j < outF; j += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:52:20: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
52 | for (int seg = threadIdx.x; seg < pooled_len; seg += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:52:58: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
52 | for (int seg = threadIdx.x; seg < pooled_len; seg += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:73:16: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
73 | int lane = threadIdx.x & (warpSize - 1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:74:18: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
74 | int warpId = threadIdx.x / warpSize;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:82:20: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
82 | int numWarps = blockDim.x / warpSize;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:100:16: warning: the parameter 'x' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
100 | at::Tensor x,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:103:16: warning: the parameter 'weight' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
103 | at::Tensor weight,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:104:16: warning: the parameter 'bias' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
104 | at::Tensor bias
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:129:9: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
129 | B,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:130:9: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
130 | inF,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b1_s3_optimized_shared_warp/base/base.cu:131:9: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
131 | outF,
| ^