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55_Matmul_MaxPool_Sum_Scale • hybrid_min_sync_kernel_base

Level 2 • Task 55
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    kernel_size: int,
    scale_factor: float,
    weight: torch.Tensor,
    bias: torch.Tensor,
) -> torch.Tensor:
    """
    Performs matrix multiplication, max pooling, sum, and scaling.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_features)
        kernel_size (int): Size of max pooling kernel
        scale_factor (float): Factor to scale the output by
        weight (torch.Tensor): Weight matrix of shape (out_features, in_features)
        bias (torch.Tensor): Bias vector of shape (out_features)

    Returns:
        torch.Tensor: Output tensor of shape (batch_size,)
    """
    x = F.linear(x, weight, bias)
    x = F.max_pool1d(x.unsqueeze(1), kernel_size).squeeze(1)
    x = torch.sum(x, dim=1)
    x = x * scale_factor
    return x


class Model(nn.Module):
    """
    Model that performs matrix multiplication, max pooling, sum, and scaling.
    """

    def __init__(self, in_features, out_features, kernel_size, scale_factor):
        super(Model, self).__init__()
        gemm = nn.Linear(in_features, out_features)
        self.weight = nn.Parameter(gemm.weight)
        self.bias = nn.Parameter(gemm.bias)

    def forward(self, x, kernel_size, scale_factor, fn=module_fn):
        return fn(x, kernel_size, scale_factor, self.weight, self.bias)


batch_size = 128
in_features = 10
out_features = 5
kernel_size = 2
scale_factor = 0.5


def get_inputs():
    return [torch.randn(batch_size, in_features), kernel_size, scale_factor]


def get_init_inputs():
    return [in_features, out_features, kernel_size, scale_factor]

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Model that performs matrix multiplication, max pooling, sum, and scaling.
    """
    def __init__(self, in_features, out_features, kernel_size, scale_factor):
        super(Model, self).__init__()
        self.matmul = nn.Linear(in_features, out_features)
        self.max_pool = nn.MaxPool1d(kernel_size)
        self.scale_factor = scale_factor

    def forward(self, x):
        """
        Args:
            x (torch.Tensor): Input tensor of shape (batch_size, in_features).

        Returns:
            torch.Tensor: Output tensor of shape (batch_size, out_features).
        """
        x = self.matmul(x)
        x = self.max_pool(x.unsqueeze(1)).squeeze(1)
        x = torch.sum(x, dim=1)
        x = x * self.scale_factor
        return x

batch_size = 128
in_features = 10
out_features = 5
kernel_size = 2
scale_factor = 0.5

def get_inputs():
    return [torch.randn(batch_size, in_features)]

def get_init_inputs():
    return [in_features, out_features, kernel_size, scale_factor]
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Kernel Information

Operation Name 55_Matmul_MaxPool_Sum_Scale
Level ID 2
Task ID 55
Kernel Name hybrid_min_sync_kernel_base
CUDA Speedup (Native) 3.728x
CUDA Speedup (Compile) 2.232x
CUDA Runtime 0.007 ms
PyTorch Runtime (Native) 0.026 ms
PyTorch Runtime (Compile) 0.016 ms
Correct True
Max Diff (vs. Reference) 0.000000
Model o3-mini-2025-01-31
Temperature 1.00
View Experiment Progress Details

Related Kernels (Level 2, Task 55 • 55_Matmul_MaxPool_Sum_Scale)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 optimized_shared_warp_base 0.01 3.73 2.23
🥇 smem_accel_base 0.01 3.73 2.23
🥇 indexing_optimized_kernel_base 0.01 3.73 2.23
🥇 warp_divergence_min_optimized_base 0.01 3.73 2.23
🥇 divergence_free_warp_base_base 0.01 3.73 2.23
🥇 optimized_divergence_free_kernel_base 0.01 3.73 2.23
🥇 min_warp_div_kernel_base 0.01 3.73 2.23
🥇 optimized_reduction_shfl_base 0.01 3.73 2.23
🥇 blocksize_tuning_opt_base 0.01 3.73 2.23
🥇 optimized_warp_shared_kernel_base 0.01 3.73 2.23
🥇 fused_divergence_base 0.01 3.73 2.23
🥇 optimized_hybrid_matmul_pool_base 0.01 3.73 2.23
🥇 optimized_hybrid_kernel_base 0.01 3.73 2.23
🥇 evenly_distributed_kernel_base 0.01 3.73 2.23
🥇 warp_reduction_opt_kernel_base_base 0.01 3.73 2.23
🥇 unrolled_matmul_pool_base_base 0.01 3.73 2.23
🥇 hybrid_min_sync_kernel_base 0.01 3.73 2.23
🥇 uniform_no_div_kernel_base 0.01 3.73 2.23
🥇 shared_warp_optimized_base 0.01 3.73 2.23
🥇 optimized_divergence_free_kernel_base 0.01 3.73 2.23 
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <math.h>

// This kernel performs a fused linear transformation and pooling operation while minimizing unnecessary synchronizations.
// It uses __syncthreads() only after critical shared memory operations:
// 1. After loading the input sample into shared memory.
// 2. After computing the full linear transformation into shared memory.
// 3. After writing warp-level partial sums, before the final reduction.
// The pooling reduction is then accomplished using warp shuffle intrinsics to avoid extra barriers.

__global__ void hybrid_min_sync_kernel(
    const float* __restrict__ x,
    const float* __restrict__ weight,
    const float* __restrict__ bias,
    float* __restrict__ output,
    int B,       // batch size
    int inF,     // number of input features
    int outF,    // number of output features
    int kernel_size,
    float scale_factor
) {
    int b = blockIdx.x;
    if (b >= B) return;

    // Shared memory layout:
    // [0, inF)                -> shared copy of input x
    // [inF, inF + outF)       -> results of linear transformation (linear_out)
    // [inF + outF, inF + outF + numWarps) -> warp-level partial sums
    extern __shared__ float sdata[];
    float* shared_x = sdata;             // size: inF
    float* linear_out = shared_x + inF;    // size: outF
    int numWarps = blockDim.x / 32;
    float* warp_sums = linear_out + outF;  // size: numWarps

    // Phase 1: Load input sample x into shared memory
    for (int i = threadIdx.x; i < inF; i += blockDim.x) {
        shared_x[i] = x[b * inF + i];
    }
    __syncthreads(); // Ensure all of shared_x is loaded

    // Phase 2: Compute the linear transformation: linear_out[j] = bias[j] + dot(shared_x, weight_j)
    for (int j = threadIdx.x; j < outF; j += blockDim.x) {
        float acc = bias[j];
        for (int i = 0; i < inF; i++) {
            acc = __fmaf_rn(shared_x[i], weight[j * inF + i], acc);
        }
        linear_out[j] = acc;
    }
    __syncthreads(); // Ensure linear_out is fully computed

    // Phase 3: Perform max pooling over segments of size 'kernel_size'
    int pooled_len = (outF >= kernel_size) ? (1 + (outF - kernel_size) / kernel_size) : 0;
    float local_sum = 0.0f;
    for (int seg = threadIdx.x; seg < pooled_len; seg += blockDim.x) {
        int start = seg * kernel_size;
        float max_val = linear_out[start];
        for (int k = 1; k < kernel_size; k++) {
            max_val = fmaxf(max_val, linear_out[start + k]);
        }
        local_sum += max_val;
    }

    // Phase 4: Intra-warp reduction using warp shuffle to reduce local_sum
    unsigned int mask = 0xffffffff;
    float sum_reg = local_sum;
    for (int offset = 16; offset > 0; offset /= 2) {
        sum_reg += __shfl_down_sync(mask, sum_reg, offset);
    }

    // Phase 5: Each warp leader writes its partial sum to shared memory
    if ((threadIdx.x & 31) == 0) {
        warp_sums[threadIdx.x >> 5] = sum_reg;
    }
    __syncthreads(); // Ensure all warp sums are written

    // Phase 6: Final reduction from warp sums performed by the first warp
    float final_sum = 0.0f;
    if (threadIdx.x < numWarps) {
        final_sum = warp_sums[threadIdx.x];
    }
    if (threadIdx.x < 32) { // First warp reduces the warp_sums
        for (int offset = 16; offset > 0; offset /= 2) {
            final_sum += __shfl_down_sync(mask, final_sum, offset);
        }
    }
    if (threadIdx.x == 0) {
        output[b] = final_sum * scale_factor;
    }
}

// Forward function callable from Python
at::Tensor forward(
    at::Tensor x,
    int64_t kernel_size,
    double scale_factor,
    at::Tensor weight,
    at::Tensor bias
) {
    TORCH_CHECK(x.is_cuda(), "x must be a CUDA tensor");
    TORCH_CHECK(weight.is_cuda(), "weight must be a CUDA tensor");
    TORCH_CHECK(bias.is_cuda(), "bias must be a CUDA tensor");
    TORCH_CHECK(x.dim() == 2, "x must have shape (B, inF)");
    TORCH_CHECK(weight.dim() == 2, "weight must have shape (outF, inF)");
    TORCH_CHECK(bias.dim() == 1, "bias must have shape (outF)");

    int B = x.size(0);
    int inF = x.size(1);
    int outF = weight.size(0);

    auto out = torch::empty({B}, x.options());

    // Configure kernel launch
    int threads = 256;
    int numWarps = threads / 32;
    // Shared memory: space for shared_x (inF), linear_out (outF), and warp sums (numWarps)
    size_t sharedMemSize = (inF + outF + numWarps) * sizeof(float);

    // Launch one block per sample
    hybrid_min_sync_kernel<<<B, threads, sharedMemSize>>>(
        x.data_ptr<float>(),
        weight.data_ptr<float>(),
        bias.data_ptr<float>(),
        out.data_ptr<float>(),
        B, inF, outF,
        static_cast<int>(kernel_size),
        static_cast<float>(scale_factor)
    );

    return out;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &forward, "Hybrid CUDA forward with minimal synchronizations");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.230 inst/cycle 0.000 5
Executed Ipc Elapsed 0.114 inst/cycle 0.000 5
Issue Slots Busy 5.830 % 0.001 5
Issued Ipc Active 0.230 inst/cycle 0.000 5
SM Busy 5.830 % 0.001 5
Memory Throughput 3271719460.866 byte/second 4255137037425319.000 5
Mem Busy 6.822 % 0.005 5
Max Bandwidth 3.602 % 0.000 5
L1/TEX Hit Rate 79.630 % 0.000 5
L2 Hit Rate 103.740 % 0.774 5
Mem Pipes Busy 2.176 % 0.000 5
Warp Cycles Per Issued Instruction 33.470 cycle 1.279 5
Warp Cycles Per Executed Instruction 34.264 cycle 1.346 5
Avg. Active Threads Per Warp 27.530 0.000 5
Avg. Not Predicated Off Threads Per Warp 22.030 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 6.000 block 0.000 5
Block Limit Shared Mem 14.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 48.000 warp 0.000 5
Theoretical Occupancy 75.000 % 0.000 5
Achieved Occupancy 11.782 % 0.000 5
Achieved Active Warps Per SM 7.540 warp 0.000 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN ThreadDivergence Instructions are executed in warps, which are groups of 32 threads. Optimal instruction throughput is achieved if all 32 threads of a warp execute the same instruction. The chosen launch configuration, early thread completion, and divergent flow control can significantly lower the number of active threads in a warp per cycle. This kernel achieves an average of 27.5 threads being active per cycle. This is further reduced to 22.0 threads per warp due to predication. The compiler may use predication to avoid an actual branch. Instead, all instructions are scheduled, but a per-thread condition code or predicate controls which threads execute the instructions. Try to avoid different execution paths within a warp when possible. In addition, ensure your kernel makes use of Independent Thread Scheduling, which allows a warp to reconverge after a data-dependent conditional block by explicitly calling __syncwarp().
WRN Occupancy This kernel's theoretical occupancy (75.0%) is limited by the number of required registers. The difference between calculated theoretical (75.0%) and measured achieved occupancy (11.8%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 428794.39 μs
Device Time 5.85 μs
Self CPU Time 48.04 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 428746.35 μs
Device Time 5.85 μs
Self CPU Time 99.89 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 428515.38 μs
Device Time 0.00 μs
Self CPU Time 108.38 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 426004.09 μs
Device Time 0.00 μs
Self CPU Time 426004.09 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 412283.90 μs
Device Time 18253.42 μs
Self CPU Time 412283.90 μs
Self Device Time 18253.42 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
hybrid_min_sync_kernel(float const*, float const*, float const*, float*, int, int, int, int, float)
CPU Time 0.00 μs
Device Time 29160.59 μs
Self CPU Time 0.00 μs
Self Device Time 29160.59 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaEventRecord
CPU Time 15245.99 μs
Device Time 36110.74 μs
Self CPU Time 15245.99 μs
Self Device Time 36110.74 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 57717.86 μs
Device Time 543399.00 μs
Self CPU Time 13171.41 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 44547.97 μs
Device Time 543399.00 μs
Self CPU Time 13393.22 μs
Self Device Time 543399.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 543399.00 μs
Self CPU Time 0.00 μs
Self Device Time 543399.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed 
45295 warnings generated when compiling for host.
Suppressed 45325 warnings (45278 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:14:5 bugprone-easily-swappable-parameters
14 | const float* __restrict__ x,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
15 | const float* __restrict__ weight,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
16 | const float* __restrict__ bias,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:14:31: note: the first parameter in the range is 'x'
14 | const float* __restrict__ x,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:16:31: note: the last parameter in the range is 'bias'
16 | const float* __restrict__ bias,
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:18:5: warning: 3 adjacent parameters of 'hybrid_min_sync_kernel' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
18 | int B, // batch size
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
19 | int inF, // number of input features
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
20 | int outF, // number of output features
| ~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:18:9: note: the first parameter in the range is 'B'
18 | int B, // batch size
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:20:9: note: the last parameter in the range is 'outF'
20 | int outF, // number of output features
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:21:5: warning: 2 adjacent parameters of 'hybrid_min_sync_kernel' of convertible types are easily swapped by mistake [bugprone-easily-swappable-parameters]
21 | int kernel_size,
| ^~~~~~~~~~~~~~~~
22 | float scale_factor
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:21:9: note: the first parameter in the range is 'kernel_size'
21 | int kernel_size,
| ^~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:22:11: note: the last parameter in the range is 'scale_factor'
22 | float scale_factor
| ^~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:22:5: note: 'int' and 'float' may be implicitly converted
22 | float scale_factor
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:24:13: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
24 | int b = blockIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:34:20: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
34 | int numWarps = blockDim.x / 32;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:38:18: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
38 | for (int i = threadIdx.x; i < inF; i += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:38:45: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
38 | for (int i = threadIdx.x; i < inF; i += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:44:18: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
44 | for (int j = threadIdx.x; j < outF; j += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:44:46: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
44 | for (int j = threadIdx.x; j < outF; j += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:56:20: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
56 | for (int seg = threadIdx.x; seg < pooled_len; seg += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:56:58: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
56 | for (int seg = threadIdx.x; seg < pooled_len; seg += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:95:16: warning: the parameter 'x' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
95 | at::Tensor x,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:98:16: warning: the parameter 'weight' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
98 | at::Tensor weight,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:99:16: warning: the parameter 'bias' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
99 | at::Tensor bias
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:108:13: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
108 | int B = x.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:109:15: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
109 | int inF = x.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b9_s1_hybrid_min_sync_kernel/base/base.cu:110:16: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
110 | int outF = weight.size(0);
| ^