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55_Matmul_MaxPool_Sum_Scale • shared_warp_optimized_base

Level 2 • Task 55
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    kernel_size: int,
    scale_factor: float,
    weight: torch.Tensor,
    bias: torch.Tensor,
) -> torch.Tensor:
    """
    Performs matrix multiplication, max pooling, sum, and scaling.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_features)
        kernel_size (int): Size of max pooling kernel
        scale_factor (float): Factor to scale the output by
        weight (torch.Tensor): Weight matrix of shape (out_features, in_features)
        bias (torch.Tensor): Bias vector of shape (out_features)

    Returns:
        torch.Tensor: Output tensor of shape (batch_size,)
    """
    x = F.linear(x, weight, bias)
    x = F.max_pool1d(x.unsqueeze(1), kernel_size).squeeze(1)
    x = torch.sum(x, dim=1)
    x = x * scale_factor
    return x


class Model(nn.Module):
    """
    Model that performs matrix multiplication, max pooling, sum, and scaling.
    """

    def __init__(self, in_features, out_features, kernel_size, scale_factor):
        super(Model, self).__init__()
        gemm = nn.Linear(in_features, out_features)
        self.weight = nn.Parameter(gemm.weight)
        self.bias = nn.Parameter(gemm.bias)

    def forward(self, x, kernel_size, scale_factor, fn=module_fn):
        return fn(x, kernel_size, scale_factor, self.weight, self.bias)


batch_size = 128
in_features = 10
out_features = 5
kernel_size = 2
scale_factor = 0.5


def get_inputs():
    return [torch.randn(batch_size, in_features), kernel_size, scale_factor]


def get_init_inputs():
    return [in_features, out_features, kernel_size, scale_factor]

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Model that performs matrix multiplication, max pooling, sum, and scaling.
    """
    def __init__(self, in_features, out_features, kernel_size, scale_factor):
        super(Model, self).__init__()
        self.matmul = nn.Linear(in_features, out_features)
        self.max_pool = nn.MaxPool1d(kernel_size)
        self.scale_factor = scale_factor

    def forward(self, x):
        """
        Args:
            x (torch.Tensor): Input tensor of shape (batch_size, in_features).

        Returns:
            torch.Tensor: Output tensor of shape (batch_size, out_features).
        """
        x = self.matmul(x)
        x = self.max_pool(x.unsqueeze(1)).squeeze(1)
        x = torch.sum(x, dim=1)
        x = x * self.scale_factor
        return x

batch_size = 128
in_features = 10
out_features = 5
kernel_size = 2
scale_factor = 0.5

def get_inputs():
    return [torch.randn(batch_size, in_features)]

def get_init_inputs():
    return [in_features, out_features, kernel_size, scale_factor]
Download Evaluation Download PyTorch Download CUDA Download Profiles

Kernel Information

Operation Name 55_Matmul_MaxPool_Sum_Scale
Level ID 2
Task ID 55
Kernel Name shared_warp_optimized_base
CUDA Speedup (Native) 3.728x
CUDA Speedup (Compile) 2.232x
CUDA Runtime 0.007 ms
PyTorch Runtime (Native) 0.026 ms
PyTorch Runtime (Compile) 0.016 ms
Correct True
Max Diff (vs. Reference) 0.000000
Model o3-mini-2025-01-31
Temperature 1.00
View Experiment Progress Details

Related Kernels (Level 2, Task 55 • 55_Matmul_MaxPool_Sum_Scale)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 optimized_shared_warp_base 0.01 3.73 2.23
🥇 smem_accel_base 0.01 3.73 2.23
🥇 indexing_optimized_kernel_base 0.01 3.73 2.23
🥇 warp_divergence_min_optimized_base 0.01 3.73 2.23
🥇 divergence_free_warp_base_base 0.01 3.73 2.23
🥇 optimized_divergence_free_kernel_base 0.01 3.73 2.23
🥇 min_warp_div_kernel_base 0.01 3.73 2.23
🥇 optimized_reduction_shfl_base 0.01 3.73 2.23
🥇 blocksize_tuning_opt_base 0.01 3.73 2.23
🥇 optimized_warp_shared_kernel_base 0.01 3.73 2.23
🥇 fused_divergence_base 0.01 3.73 2.23
🥇 optimized_hybrid_matmul_pool_base 0.01 3.73 2.23
🥇 optimized_hybrid_kernel_base 0.01 3.73 2.23
🥇 evenly_distributed_kernel_base 0.01 3.73 2.23
🥇 warp_reduction_opt_kernel_base_base 0.01 3.73 2.23
🥇 unrolled_matmul_pool_base_base 0.01 3.73 2.23
🥇 hybrid_min_sync_kernel_base 0.01 3.73 2.23
🥇 uniform_no_div_kernel_base 0.01 3.73 2.23
🥇 shared_warp_optimized_base 0.01 3.73 2.23
🥇 optimized_divergence_free_kernel_base 0.01 3.73 2.23 
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>

// Combined kernel that leverages shared memory for the input vector and uses warp-level primitives for fast reduction
// of the max-pooling results. Each block processes one batch element.

__global__ void combined_kernel(
    const float* __restrict__ x,
    const float* __restrict__ weight,
    const float* __restrict__ bias,
    float* __restrict__ output,
    int B,
    int inF,
    int outF,
    int kernel_size,
    float scale_factor
) {
    int b = blockIdx.x;
    if (b >= B) return;

    // Dynamically allocated shared memory layout:
    // [ shared_x (inF elements) | local_out (outF elements) | warp_sums (blockDim.x/32 elements) ]
    extern __shared__ float smem[];
    float* shared_x = smem;                // size: inF
    float* local_out  = shared_x + inF;     // size: outF
    float* warp_sums  = local_out + outF;    // size: blockDim.x / 32

    // 1. Load the input vector for this batch sample into shared memory
    for (int i = threadIdx.x; i < inF; i += blockDim.x) {
        shared_x[i] = x[b * inF + i];
    }
    __syncthreads();

    // 2. Compute F.linear: each thread computes dot products for output indices in a strided manner
    for (int j = threadIdx.x; j < outF; j += blockDim.x) {
        float sum = bias[j];
        // Use shared_x to reduce global memory traffic
        for (int i = 0; i < inF; i++) {
            sum += shared_x[i] * weight[j * inF + i];
        }
        local_out[j] = sum;
    }
    __syncthreads();

    // 3. Perform max pooling on local_out in segments of size 'kernel_size'
    int pooled_len = (outF >= kernel_size) ? ((outF - kernel_size) / kernel_size + 1) : 0;
    float sum_local = 0.0f;

    // Each thread processes a subset of pooling segments
    for (int seg = threadIdx.x; seg < pooled_len; seg += blockDim.x) {
        int start = seg * kernel_size;
        float max_val = local_out[start];
        for (int k = 1; k < kernel_size; k++) {
            float candidate = local_out[start + k];
            if (candidate > max_val) {
                max_val = candidate;
            }
        }
        sum_local += max_val;
    }

    // 4. Warp-level reduction on sum_local using shuffle intrinsics
    const unsigned int warpSize = 32;
    unsigned int lane = threadIdx.x % warpSize;
    for (int offset = warpSize / 2; offset > 0; offset /= 2) {
        sum_local += __shfl_down_sync(0xffffffff, sum_local, offset);
    }
    
    // Write the result from each warp's lane 0 to the warp_sums buffer
    if (lane == 0) {
        int warp_id = threadIdx.x / warpSize;
        warp_sums[warp_id] = sum_local;
    }
    __syncthreads();

    // 5. Final reduction: let the first warp reduce the per-warp sums
    int num_warps = blockDim.x / warpSize;
    if (threadIdx.x < num_warps) {
        float final_sum = warp_sums[threadIdx.x];
        for (int offset = num_warps / 2; offset > 0; offset /= 2) {
            final_sum += __shfl_down_sync(0xffffffff, final_sum, offset);
        }
        if (threadIdx.x == 0) {
            output[b] = final_sum * scale_factor;
        }
    }
}


// Host-side forward function callable from Python
at::Tensor forward(
    at::Tensor x,
    int64_t kernel_size,
    double scale_factor,
    at::Tensor weight,
    at::Tensor bias
) {
    TORCH_CHECK(x.is_cuda(), "x must be a CUDA tensor");
    TORCH_CHECK(weight.is_cuda(), "weight must be a CUDA tensor");
    TORCH_CHECK(bias.is_cuda(), "bias must be a CUDA tensor");
    TORCH_CHECK(x.dim() == 2, "x must have shape (batch_size, in_features)");
    TORCH_CHECK(weight.dim() == 2, "weight must have shape (out_features, in_features)");
    TORCH_CHECK(bias.dim() == 1, "bias must have shape (out_features)");

    const int B = x.size(0);
    const int inF = x.size(1);
    const int outF = weight.size(0);

    auto out = torch::empty({B}, x.options());
    
    const int threads = 256;
    int warps_per_block = threads / 32;
    // Shared memory layout: inF + outF + warps_per_block floats
    size_t sharedMemSize = (inF + outF + warps_per_block) * sizeof(float);

    combined_kernel<<<B, threads, sharedMemSize>>>(
        x.data_ptr<float>(),
        weight.data_ptr<float>(),
        bias.data_ptr<float>(),
        out.data_ptr<float>(),
        B,
        inF,
        outF,
        static_cast<int>(kernel_size),
        static_cast<float>(scale_factor)
    );

    return out;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &forward, "Combined CUDA kernel with shared memory and warp-level reduction optimizations");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.212 inst/cycle 0.000 5
Executed Ipc Elapsed 0.100 inst/cycle 0.000 5
Issue Slots Busy 5.496 % 0.037 5
Issued Ipc Active 0.222 inst/cycle 0.000 5
SM Busy 5.496 % 0.037 5
Memory Throughput 3170777019.990 byte/second 739047017647852.750 5
Mem Busy 6.670 % 0.017 5
Max Bandwidth 3.496 % 0.003 5
L1/TEX Hit Rate 79.630 % 0.000 5
L2 Hit Rate 104.154 % 0.028 5
Mem Pipes Busy 2.028 % 0.001 5
Warp Cycles Per Issued Instruction 33.982 cycle 2.203 5
Warp Cycles Per Executed Instruction 35.358 cycle 2.390 5
Avg. Active Threads Per Warp 26.300 0.000 5
Avg. Not Predicated Off Threads Per Warp 22.160 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 8.000 block 0.000 5
Block Limit Shared Mem 28.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 11.556 % 0.001 5
Achieved Active Warps Per SM 7.396 warp 0.001 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN ThreadDivergence Instructions are executed in warps, which are groups of 32 threads. Optimal instruction throughput is achieved if all 32 threads of a warp execute the same instruction. The chosen launch configuration, early thread completion, and divergent flow control can significantly lower the number of active threads in a warp per cycle. This kernel achieves an average of 26.3 threads being active per cycle. This is further reduced to 22.2 threads per warp due to predication. The compiler may use predication to avoid an actual branch. Instead, all instructions are scheduled, but a per-thread condition code or predicate controls which threads execute the instructions. Try to avoid different execution paths within a warp when possible. In addition, ensure your kernel makes use of Independent Thread Scheduling, which allows a warp to reconverge after a data-dependent conditional block by explicitly calling __syncwarp().
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (11.5%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 1011845.40 μs
Device Time 5.38 μs
Self CPU Time 56.79 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 1011788.61 μs
Device Time 5.38 μs
Self CPU Time 96.90 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 1011537.15 μs
Device Time 0.00 μs
Self CPU Time 104.70 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 1006740.95 μs
Device Time 0.00 μs
Self CPU Time 1006740.95 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 453717.12 μs
Device Time 21047.11 μs
Self CPU Time 453717.12 μs
Self Device Time 21047.11 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
combined_kernel(float const*, float const*, float const*, float*, int, int, int, int, float)
CPU Time 0.00 μs
Device Time 30682.14 μs
Self CPU Time 0.00 μs
Self Device Time 30682.14 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaEventRecord
CPU Time 16382.36 μs
Device Time 38982.88 μs
Self CPU Time 16382.36 μs
Self Device Time 38982.88 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 62597.71 μs
Device Time 583448.88 μs
Self CPU Time 14006.91 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 48594.38 μs
Device Time 583448.88 μs
Self CPU Time 16274.04 μs
Self Device Time 583448.88 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 583448.88 μs
Self CPU Time 0.00 μs
Self Device Time 583448.88 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed 
45296 warnings generated when compiling for host.
Suppressed 45325 warnings (45278 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:9:5 bugprone-easily-swappable-parameters
9 | const float* __restrict__ x,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 | const float* __restrict__ weight,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
11 | const float* __restrict__ bias,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:9:31: note: the first parameter in the range is 'x'
9 | const float* __restrict__ x,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:11:31: note: the last parameter in the range is 'bias'
11 | const float* __restrict__ bias,
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:13:5: warning: 3 adjacent parameters of 'combined_kernel' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
13 | int B,
| ^~~~~~
14 | int inF,
| ~~~~~~~~
15 | int outF,
| ~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:13:9: note: the first parameter in the range is 'B'
13 | int B,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:15:9: note: the last parameter in the range is 'outF'
15 | int outF,
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:16:5: warning: 2 adjacent parameters of 'combined_kernel' of convertible types are easily swapped by mistake [bugprone-easily-swappable-parameters]
16 | int kernel_size,
| ^~~~~~~~~~~~~~~~
17 | float scale_factor
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:16:9: note: the first parameter in the range is 'kernel_size'
16 | int kernel_size,
| ^~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:17:11: note: the last parameter in the range is 'scale_factor'
17 | float scale_factor
| ^~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:17:5: note: 'int' and 'float' may be implicitly converted
17 | float scale_factor
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:19:13: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
19 | int b = blockIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:30:18: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
30 | for (int i = threadIdx.x; i < inF; i += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:30:45: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
30 | for (int i = threadIdx.x; i < inF; i += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:36:18: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
36 | for (int j = threadIdx.x; j < outF; j += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:36:46: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
36 | for (int j = threadIdx.x; j < outF; j += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:51:20: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
51 | for (int seg = threadIdx.x; seg < pooled_len; seg += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:51:58: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
51 | for (int seg = threadIdx.x; seg < pooled_len; seg += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:72:23: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
72 | int warp_id = threadIdx.x / warpSize;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:78:21: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
78 | int num_warps = blockDim.x / warpSize;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:93:16: warning: the parameter 'x' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
93 | at::Tensor x,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:96:16: warning: the parameter 'weight' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
96 | at::Tensor weight,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:97:16: warning: the parameter 'bias' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
97 | at::Tensor bias
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:106:19: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
106 | const int B = x.size(0);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:107:21: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
107 | const int inF = x.size(1);
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250203_optimize_b10_s4_e0_sweep/level_2/task_55/b8_s3_shared_warp_optimized/base/base.cu:108:22: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
108 | const int outF = weight.size(0);
| ^