← Back to Leaderboard

The AI CUDA Engineer 👷

55_Matmul_MaxPool_Sum_Scaletiled_matmul_pool_sync_opt_base

Level 2 • Task 55
import torch
import torch.nn as nn
import torch.nn.functional as F


def module_fn(
    x: torch.Tensor,
    kernel_size: int,
    scale_factor: float,
    weight: torch.Tensor,
    bias: torch.Tensor,
) -> torch.Tensor:
    """
    Performs matrix multiplication, max pooling, sum, and scaling.

    Args:
        x (torch.Tensor): Input tensor of shape (batch_size, in_features)
        kernel_size (int): Size of max pooling kernel
        scale_factor (float): Factor to scale the output by
        weight (torch.Tensor): Weight matrix of shape (out_features, in_features)
        bias (torch.Tensor): Bias vector of shape (out_features)

    Returns:
        torch.Tensor: Output tensor of shape (batch_size,)
    """
    x = F.linear(x, weight, bias)
    x = F.max_pool1d(x.unsqueeze(1), kernel_size).squeeze(1)
    x = torch.sum(x, dim=1)
    x = x * scale_factor
    return x


class Model(nn.Module):
    """
    Model that performs matrix multiplication, max pooling, sum, and scaling.
    """

    def __init__(self, in_features, out_features, kernel_size, scale_factor):
        super(Model, self).__init__()
        gemm = nn.Linear(in_features, out_features)
        self.weight = nn.Parameter(gemm.weight)
        self.bias = nn.Parameter(gemm.bias)

    def forward(self, x, kernel_size, scale_factor, fn=module_fn):
        return fn(x, kernel_size, scale_factor, self.weight, self.bias)


batch_size = 128
in_features = 10
out_features = 5
kernel_size = 2
scale_factor = 0.5


def get_inputs():
    return [torch.randn(batch_size, in_features), kernel_size, scale_factor]


def get_init_inputs():
    return [in_features, out_features, kernel_size, scale_factor]
import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Model that performs matrix multiplication, max pooling, sum, and scaling.
    """
    def __init__(self, in_features, out_features, kernel_size, scale_factor):
        super(Model, self).__init__()
        self.matmul = nn.Linear(in_features, out_features)
        self.max_pool = nn.MaxPool1d(kernel_size)
        self.scale_factor = scale_factor

    def forward(self, x):
        """
        Args:
            x (torch.Tensor): Input tensor of shape (batch_size, in_features).

        Returns:
            torch.Tensor: Output tensor of shape (batch_size, out_features).
        """
        x = self.matmul(x)
        x = self.max_pool(x.unsqueeze(1)).squeeze(1)
        x = torch.sum(x, dim=1)
        x = x * self.scale_factor
        return x

batch_size = 128
in_features = 10
out_features = 5
kernel_size = 2
scale_factor = 0.5

def get_inputs():
    return [torch.randn(batch_size, in_features)]

def get_init_inputs():
    return [in_features, out_features, kernel_size, scale_factor]

Kernel Information

Related Kernels (Level 2, Task 55 • 55_Matmul_MaxPool_Sum_Scale)

Rank Kernel Name Runtime (ms) Speedup Native Speedup Compile
🥇 optimized_shared_warp_base 0.01 3.73 2.23
🥇 smem_accel_base 0.01 3.73 2.23
🥇 indexing_optimized_kernel_base 0.01 3.73 2.23
🥇 warp_divergence_min_optimized_base 0.01 3.73 2.23
🥇 divergence_free_warp_base_base 0.01 3.73 2.23
🥇 optimized_divergence_free_kernel_base 0.01 3.73 2.23
🥇 min_warp_div_kernel_base 0.01 3.73 2.23
🥇 optimized_reduction_shfl_base 0.01 3.73 2.23
🥇 blocksize_tuning_opt_base 0.01 3.73 2.23
🥇 optimized_warp_shared_kernel_base 0.01 3.73 2.23
🥇 fused_divergence_base 0.01 3.73 2.23
🥇 optimized_hybrid_matmul_pool_base 0.01 3.73 2.23
🥇 optimized_hybrid_kernel_base 0.01 3.73 2.23
🥇 evenly_distributed_kernel_base 0.01 3.73 2.23
🥇 warp_reduction_opt_kernel_base_base 0.01 3.73 2.23
🥇 unrolled_matmul_pool_base_base 0.01 3.73 2.23
🥇 hybrid_min_sync_kernel_base 0.01 3.73 2.23
🥇 uniform_no_div_kernel_base 0.01 3.73 2.23
🥇 shared_warp_optimized_base 0.01 3.73 2.23
🥇 optimized_divergence_free_kernel_base 0.01 3.73 2.23
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>

// Warp-level reduction to sum values within a warp without full block synchronization
__device__ __forceinline__ float warp_reduce_sum(float val) {
    unsigned mask = 0xffffffff;
    for (int offset = warpSize/2; offset > 0; offset /= 2) {
        val += __shfl_down_sync(mask, val, offset);
    }
    return val;
}

// Optimized kernel with minimal use of __syncthreads() for shared memory consistency
__global__ void module_fn_kernel(
    const float* __restrict__ x,
    const float* __restrict__ weight,
    const float* __restrict__ bias,
    float* __restrict__ output,
    int B,    // batch size
    int inF,  // number of input features
    int outF, // number of output features
    int kernel_size,
    float scale_factor
) {
    int b = blockIdx.x;    
    int tid = threadIdx.x;
    if (b >= B) return;

    // Initialize output for this batch element to 0 (required for atomicAdds later)
    if (tid == 0) {
        output[b] = 0.0f;
    }
    // Ensure all threads see the initialized value
    __syncthreads();

    // Shared memory to store matrix multiplication results for the current batch element
    // Allocated size: outF floats
    extern __shared__ float s_data[];

    // Phase 1: Matrix multiplication + bias addition
    // Each thread computes a subset of output features with a stride of blockDim.x
    for (int j = tid; j < outF; j += blockDim.x) {
        float sum = bias[j];
        const float* x_row = x + b * inF; 
        const float* w_row = weight + j * inF;
        for (int i = 0; i < inF; i++) {
            sum += x_row[i] * w_row[i];
        }
        s_data[j] = sum;
    }
    // Synchronize to ensure all matrix multiplication results are written to shared memory
    __syncthreads();

    // Phase 2: Max pooling over computed features
    // Pool along output features with window size 'kernel_size'
    int pooled_len = 1 + (outF - kernel_size) / kernel_size;
    float p_sum = 0.0f;
    for (int seg = tid; seg < pooled_len; seg += blockDim.x) {
        int start = seg * kernel_size;
        float max_val = s_data[start];
        #pragma unroll
        for (int k = 1; k < kernel_size; k++) {
            float val = s_data[start + k];
            max_val = (val > max_val) ? val : max_val;
        }
        p_sum += max_val;
    }

    // Warp-level reduction for pooling sums within each warp
    unsigned int lane = tid & (warpSize - 1);
    p_sum = warp_reduce_sum(p_sum);

    // Each warp leader accumulates its reduced sum into global output atomically
    if (lane == 0) {
        atomicAdd(&output[b], p_sum);
    }
    // Synchronize to ensure all atomicAdds are complete before final scaling
    __syncthreads();

    // Phase 3: Final scaling by scale_factor (done by thread 0 only)
    if (tid == 0) {
        output[b] *= scale_factor;
    }
}

// Host forward function to be called from Python
at::Tensor forward(
    at::Tensor x,
    int64_t kernel_size,
    double scale_factor,
    at::Tensor weight,
    at::Tensor bias
) {
    TORCH_CHECK(x.is_cuda(), "x must be a CUDA tensor");
    TORCH_CHECK(weight.is_cuda(), "weight must be a CUDA tensor");
    TORCH_CHECK(bias.is_cuda(), "bias must be a CUDA tensor");
    TORCH_CHECK(x.dim() == 2, "x must have shape (batch_size, in_features)");
    TORCH_CHECK(weight.dim() == 2, "weight must have shape (out_features, in_features)");
    TORCH_CHECK(bias.dim() == 1, "bias must have shape (out_features)");

    const auto B = x.size(0);
    const auto inF = x.size(1);
    const auto outF = weight.size(0);

    auto out = torch::empty({B}, x.options());

    const int threadsPerBlock = 256;
    // Allocate shared memory to store outF floats (matrix multiplication results)
    size_t sharedMemSize = outF * sizeof(float);

    module_fn_kernel<<<B, threadsPerBlock, sharedMemSize>>>(
        x.data_ptr<float>(),
        weight.data_ptr<float>(),
        bias.data_ptr<float>(),
        out.data_ptr<float>(),
        B,
        inF,
        outF,
        (int)kernel_size,
        (float)scale_factor
    );

    return out;
}

PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("forward", &forward, "Optimized CUDA forward for module_fn with minimal synchronizations");
}
Performance Metrics
Metric Value Unit Variance Samples
Executed Ipc Active 0.240 inst/cycle 0.000 5
Executed Ipc Elapsed 0.120 inst/cycle 0.000 5
Issue Slots Busy 6.070 % 0.029 5
Issued Ipc Active 0.242 inst/cycle 0.000 5
SM Busy 6.070 % 0.029 5
Memory Throughput 2956652737.430 byte/second 1520151299275910.000 5
Mem Busy 7.054 % 0.011 5
Max Bandwidth 3.756 % 0.002 5
L1/TEX Hit Rate 72.220 % 0.000 5
L2 Hit Rate 102.704 % 0.360 5
Mem Pipes Busy 2.032 % 0.001 5
Warp Cycles Per Issued Instruction 27.624 cycle 0.828 5
Warp Cycles Per Executed Instruction 28.156 cycle 0.865 5
Avg. Active Threads Per Warp 26.840 0.000 5
Avg. Not Predicated Off Threads Per Warp 24.570 0.000 5
Max Active Clusters 0.000 cluster 0.000 5
Max Cluster Size 8.000 block 0.000 5
Overall GPU Occupancy 0.000 % 0.000 5
Cluster Occupancy 0.000 % 0.000 5
Block Limit SM 32.000 block 0.000 5
Block Limit Registers 8.000 block 0.000 5
Block Limit Shared Mem 28.000 block 0.000 5
Block Limit Warps 8.000 block 0.000 5
Theoretical Active Warps per SM 64.000 warp 0.000 5
Theoretical Occupancy 100.000 % 0.000 5
Achieved Occupancy 10.564 % 0.034 5
Achieved Active Warps Per SM 6.762 warp 0.013 5
Analysis Rules
Rule Description
WRN HighPipeUtilization All compute pipelines are under-utilized. Either this kernel is very small or it doesn't issue enough warps per scheduler. Check the Launch Statistics and Scheduler Statistics sections for further details.
INF CPIStall Check the Warp Stall Sampling (All Cycles) table for the top stall locations in your source based on sampling data. The Kernel Profiling Guide (https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#metrics-reference) provides more details on each stall reason.
WRN Occupancy This kernel's theoretical occupancy is not impacted by any block limit. The difference between calculated theoretical (100.0%) and measured achieved occupancy (10.3%) can be the result of warp scheduling overheads or workload imbalances during the kernel execution. Load imbalances can occur between warps within a block as well as across blocks of the same kernel. See the CUDA Best Practices Guide (https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/index.html#occupancy) for more details on optimizing occupancy.
Operation / Metric Value Unit
aten::to
CPU Time 340877.84 μs
Device Time 2.75 μs
Self CPU Time 61.26 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::_to_copy
CPU Time 340816.58 μs
Device Time 2.75 μs
Self CPU Time 136.05 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::empty_strided
CPU Time 340528.37 μs
Device Time 0.00 μs
Self CPU Time 108.84 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaDeviceGetStreamPriorityRange
CPU Time 340231.49 μs
Device Time 0.00 μs
Self CPU Time 340231.49 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaLaunchKernel
CPU Time 437440.40 μs
Device Time 16436.13 μs
Self CPU Time 437440.40 μs
Self Device Time 16436.13 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
module_fn_kernel(float const*, float const*, float const*, float*, int, int, int, int, float)
CPU Time 0.00 μs
Device Time 24599.17 μs
Self CPU Time 0.00 μs
Self Device Time 24599.17 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
cudaEventRecord
CPU Time 22749.98 μs
Device Time 31681.48 μs
Self CPU Time 22749.98 μs
Self Device Time 31681.48 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::zero_
CPU Time 73480.45 μs
Device Time 592980.38 μs
Self CPU Time 13989.00 μs
Self Device Time 0.00 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
aten::fill_
CPU Time 59492.26 μs
Device Time 592980.38 μs
Self CPU Time 16490.74 μs
Self Device Time 592980.38 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<int>, at::detail::Array<char*, 1> >(int, at::native::FillFunctor<int>, at::detail::Array<char*, 1>)
CPU Time 0.00 μs
Device Time 593058.30 μs
Self CPU Time 0.00 μs
Self Device Time 593058.30 μs
CPU Memory Usage 0 B
Device Memory Usage 0 B
Self CPU Memory Usage 0 B
Self Device Memory Usage 0 B
Status: Completed
45293 warnings generated when compiling for host.
Suppressed 45325 warnings (45278 in non-user code, 47 NOLINT).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:16:5 bugprone-easily-swappable-parameters
16 | const float* __restrict__ x,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
17 | const float* __restrict__ weight,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 | const float* __restrict__ bias,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:16:31: note: the first parameter in the range is 'x'
16 | const float* __restrict__ x,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:18:31: note: the last parameter in the range is 'bias'
18 | const float* __restrict__ bias,
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:20:5: warning: 3 adjacent parameters of 'module_fn_kernel' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters]
20 | int B, // batch size
| ^~~~~~~~~~~~~~~~~~~~~~~
21 | int inF, // number of input features
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
22 | int outF, // number of output features
| ~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:20:9: note: the first parameter in the range is 'B'
20 | int B, // batch size
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:22:9: note: the last parameter in the range is 'outF'
22 | int outF, // number of output features
| ^~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:23:5: warning: 2 adjacent parameters of 'module_fn_kernel' of convertible types are easily swapped by mistake [bugprone-easily-swappable-parameters]
23 | int kernel_size,
| ^~~~~~~~~~~~~~~~
24 | float scale_factor
| ~~~~~~~~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:23:9: note: the first parameter in the range is 'kernel_size'
23 | int kernel_size,
| ^~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:24:11: note: the last parameter in the range is 'scale_factor'
24 | float scale_factor
| ^~~~~~~~~~~~
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:24:5: note: 'int' and 'float' may be implicitly converted
24 | float scale_factor
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:26:13: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
26 | int b = blockIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:27:15: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
27 | int tid = threadIdx.x;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:43:38: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
43 | for (int j = tid; j < outF; j += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:45:30: warning: result of multiplication in type 'int' is used as a pointer offset after an implicit widening conversion to type 'ptrdiff_t' [bugprone-implicit-widening-of-multiplication-result]
45 | const float* x_row = x + b * inF;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:45:34: note: make conversion explicit to silence this warning
4 | const float* x_row = x + b * inF;
| ^~~~~~~
| static_cast<ptrdiff_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:45:34: note: perform multiplication in a wider type
45 | const float* x_row = x + b * inF;
| ^
| static_cast<ptrdiff_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:46:30: warning: result of multiplication in type 'int' is used as a pointer offset after an implicit widening conversion to type 'ptrdiff_t' [bugprone-implicit-widening-of-multiplication-result]
46 | const float* w_row = weight + j * inF;
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:46:39: note: make conversion explicit to silence this warning
46 | const float* w_row = weight + j * inF;
| ^~~~~~~
| static_cast<ptrdiff_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:46:39: note: perform multiplication in a wider type
46 | const float* w_row = weight + j * inF;
| ^
| static_cast<ptrdiff_t>( )
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:59:50: warning: narrowing conversion from 'unsigned int' to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
59 | for (int seg = tid; seg < pooled_len; seg += blockDim.x) {
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:89:16: warning: the parameter 'x' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
89 | at::Tensor x,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:92:16: warning: the parameter 'weight' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
92 | at::Tensor weight,
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:93:16: warning: the parameter 'bias' is copied for each invocation but only used as a const reference; consider making it a const reference [performance-unnecessary-value-param]
93 | at::Tensor bias
| ^
| const &
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:117:9: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
117 | B,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:118:9: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
118 | inF,
| ^
/home/robert_sakana_ai/llm_cuda/experiments/20250207_optimize_b5_s4_e1_sweep/level_2/task_55/b5_s1_tiled_matmul_pool_sync_opt/base/base.cu:119:9: warning: narrowing conversion from 'int64_t' (aka 'long') to signed type 'int' is implementation-defined [bugprone-narrowing-conversions]
119 | outF,
| ^